Implement RA reg class conflict support
We need to support register class conflicts in the RA.
This is because we need the regular GPR class, and an additional GPR pair class.
AArch64 CASP instructions mandate that the Expected and Desired arguments are two pairs of registers that are consecutive and start at an even offset.
So we need register pairs in one class `{x0, x1}, {x2, x3}, ...` That conflict with the regular GPR class when those are in use `x0, x1, x2, x3,...`