Incorrect order of task switching

In Intel  specifications (http://download.intel.com/design/processor/manuals/253668.pdf 7.3), we can see:

    8. Saves the state of the current (old) task in the current task’s TSS. 

…

   11. Loads the task register with the segment selector and descriptor for the new  task's TSS.

But, in QEMU code (https://raw.github.com/qemu/QEMU/v1.0/target-i386/op_helper.c :375), the order is reversed: TSS registers & segments loads BEFORE save old task state.