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[PowerPC] [patch] mtmsr does not preserve high bits of MSR
The mtmsr instruction on 64-bit PPC does not preserve the high-order 32-bits of the MSR the way it is supposed to, instead setting them to 0, which takes 64-bit code out of 64-bit mode. There is some code that does the right thing, but it brokenly only preserves these bits when the thread is not in 64-bit mode (i.e. when it doesn't matter). The attached patch unconditionally enables this code when TARGET_PPC64 is set, per the ISA spec, which fixes early boot failures trying to start FreeBSD/powerpc64 under qemu.
On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
> ** Patch added: "mtmstr.diff"
> https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
>
> --
> You received this bug notification because you are a member of qemu-
> devel-ml, which is subscribed to QEMU.
> https://bugs.launchpad.net/bugs/788697
>
> Title:
> [PowerPC] [patch] mtmsr does not preserve high bits of MSR
>
> Status in QEMU:
> New
>
> Bug description:
> The mtmsr instruction on 64-bit PPC does not preserve the high-order
> 32-bits of the MSR the way it is supposed to, instead setting them to
> 0, which takes 64-bit code out of 64-bit mode. There is some code that
> does the right thing, but it brokenly only preserves these bits when
> the thread is not in 64-bit mode (i.e. when it doesn't matter). The
> attached patch unconditionally enables this code when TARGET_PPC64 is
> set, per the ISA spec, which fixes early boot failures trying to start
> FreeBSD/powerpc64 under qemu.
>
Please send the patch as proper patch to the ML and CC me.
Alex
On 05/26/11 11:45, agraf wrote:
> On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
>
>> ** Patch added: "mtmstr.diff"
>> https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
>>
>> --
>> You received this bug notification because you are a member of qemu-
>> devel-ml, which is subscribed to QEMU.
>> https://bugs.launchpad.net/bugs/788697
>>
>> Title:
>> [PowerPC] [patch] mtmsr does not preserve high bits of MSR
>>
>> Status in QEMU:
>> New
>>
>> Bug description:
>> The mtmsr instruction on 64-bit PPC does not preserve the high-order
>> 32-bits of the MSR the way it is supposed to, instead setting them to
>> 0, which takes 64-bit code out of 64-bit mode. There is some code that
>> does the right thing, but it brokenly only preserves these bits when
>> the thread is not in 64-bit mode (i.e. when it doesn't matter). The
>> attached patch unconditionally enables this code when TARGET_PPC64 is
>> set, per the ISA spec, which fixes early boot failures trying to start
>> FreeBSD/powerpc64 under qemu.
>>
>
> Please send the patch as proper patch to the ML and CC me.
What isn't proper about the patch? I'm happy to re-email it, but don't
want things to be in the wrong format.
-Nathan
On 27.05.2011, at 01:33, Nathan Whitehorn wrote:
> On 05/26/11 11:45, agraf wrote:
>> On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
>>
>>> ** Patch added: "mtmstr.diff"
>>> https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
>>>
>>> --
>>> You received this bug notification because you are a member of qemu-
>>> devel-ml, which is subscribed to QEMU.
>>> https://bugs.launchpad.net/bugs/788697
>>>
>>> Title:
>>> [PowerPC] [patch] mtmsr does not preserve high bits of MSR
>>>
>>> Status in QEMU:
>>> New
>>>
>>> Bug description:
>>> The mtmsr instruction on 64-bit PPC does not preserve the high-order
>>> 32-bits of the MSR the way it is supposed to, instead setting them to
>>> 0, which takes 64-bit code out of 64-bit mode. There is some code that
>>> does the right thing, but it brokenly only preserves these bits when
>>> the thread is not in 64-bit mode (i.e. when it doesn't matter). The
>>> attached patch unconditionally enables this code when TARGET_PPC64 is
>>> set, per the ISA spec, which fixes early boot failures trying to start
>>> FreeBSD/powerpc64 under qemu.
>>>
>>
>> Please send the patch as proper patch to the ML and CC me.
>
> What isn't proper about the patch? I'm happy to re-email it, but don't
> want things to be in the wrong format.
> -Nathan
The patch needs a patch description in its header and a subject line (all of which are present in the bug, so it's a simple matter of copy&paste). Basically at the end of the day, I should be able to save the mail and "git am" on it and simply have it in my tree :).
Also, does this get FreeBSD booting up to anything useful, so I can verify it helps?
Alex
On 05/26/11 18:47, agraf wrote:
> On 27.05.2011, at 01:33, Nathan Whitehorn wrote:
>
>> On 05/26/11 11:45, agraf wrote:
>>> On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
>>>
>>>> ** Patch added: "mtmstr.diff"
>>>> https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
>>>>
>>>> --
>>>> You received this bug notification because you are a member of qemu-
>>>> devel-ml, which is subscribed to QEMU.
>>>> https://bugs.launchpad.net/bugs/788697
>>>>
>>>> Title:
>>>> [PowerPC] [patch] mtmsr does not preserve high bits of MSR
>>>>
>>>> Status in QEMU:
>>>> New
>>>>
>>>> Bug description:
>>>> The mtmsr instruction on 64-bit PPC does not preserve the high-order
>>>> 32-bits of the MSR the way it is supposed to, instead setting them to
>>>> 0, which takes 64-bit code out of 64-bit mode. There is some code that
>>>> does the right thing, but it brokenly only preserves these bits when
>>>> the thread is not in 64-bit mode (i.e. when it doesn't matter). The
>>>> attached patch unconditionally enables this code when TARGET_PPC64 is
>>>> set, per the ISA spec, which fixes early boot failures trying to start
>>>> FreeBSD/powerpc64 under qemu.
>>>>
>>> Please send the patch as proper patch to the ML and CC me.
>> What isn't proper about the patch? I'm happy to re-email it, but don't
>> want things to be in the wrong format.
>> -Nathan
> The patch needs a patch description in its header and a subject line
> (all of which are present in the bug, so it's a simple matter of
> copy&paste). Basically at the end of the day, I should be able to save
> the mail and "git am" on it and simply have it in my tree :).
>
> Also, does this get FreeBSD booting up to anything useful, so I can
> verify it helps?
OK, I'll send this one out to today. The other issue I'm having (aside
from our own bugs), is that SPR_PIR is not implemented for the POWER7
target. The architecture manual claims it is implemented on all Book-3S
compliant CPUs, but it seems to be implemented sort of ad-hoc in
target-ppc.c (e.g. the 604, 620, and 7400 have it, but not the 750, 970,
or POWER7).
-Nathan
On 31.05.2011, at 15:35, Nathan Whitehorn wrote:
> On 05/26/11 18:47, agraf wrote:
>> On 27.05.2011, at 01:33, Nathan Whitehorn wrote:
>>
>>> On 05/26/11 11:45, agraf wrote:
>>>> On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
>>>>
>>>>> ** Patch added: "mtmstr.diff"
>>>>> https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
>>>>>
>>>>> --
>>>>> You received this bug notification because you are a member of qemu-
>>>>> devel-ml, which is subscribed to QEMU.
>>>>> https://bugs.launchpad.net/bugs/788697
>>>>>
>>>>> Title:
>>>>> [PowerPC] [patch] mtmsr does not preserve high bits of MSR
>>>>>
>>>>> Status in QEMU:
>>>>> New
>>>>>
>>>>> Bug description:
>>>>> The mtmsr instruction on 64-bit PPC does not preserve the high-order
>>>>> 32-bits of the MSR the way it is supposed to, instead setting them to
>>>>> 0, which takes 64-bit code out of 64-bit mode. There is some code that
>>>>> does the right thing, but it brokenly only preserves these bits when
>>>>> the thread is not in 64-bit mode (i.e. when it doesn't matter). The
>>>>> attached patch unconditionally enables this code when TARGET_PPC64 is
>>>>> set, per the ISA spec, which fixes early boot failures trying to start
>>>>> FreeBSD/powerpc64 under qemu.
>>>>>
>>>> Please send the patch as proper patch to the ML and CC me.
>>> What isn't proper about the patch? I'm happy to re-email it, but don't
>>> want things to be in the wrong format.
>>> -Nathan
>> The patch needs a patch description in its header and a subject line
>> (all of which are present in the bug, so it's a simple matter of
>> copy&paste). Basically at the end of the day, I should be able to save
>> the mail and "git am" on it and simply have it in my tree :).
>>
>> Also, does this get FreeBSD booting up to anything useful, so I can
>> verify it helps?
>
> OK, I'll send this one out to today. The other issue I'm having (aside
> from our own bugs), is that SPR_PIR is not implemented for the POWER7
> target. The architecture manual claims it is implemented on all Book-3S
> compliant CPUs, but it seems to be implemented sort of ad-hoc in
> target-ppc.c (e.g. the 604, 620, and 7400 have it, but not the 750, 970,
> or POWER7).
So the reason POWER7 doesn't have it is probably because it simply does the same as 970. Why 970 doesn't register PIR, I don't know, but to me it sounds like a plain bug :). Just send a patch, CC me and David Gibson.
Alex
As far as I can see, the issue has been fixed here:
http://git.qemu.org/?p=qemu.git;a=commitdiff;h=8018dc63aab936f1a5
... so closing this ticket now.
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