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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-12-06 17:50:47 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-12-14 00:16:20 +0100
commit14f1f86d5111ed2dae19ae15da81a98ea048017d (patch)
treedfc07986c8172d8d8f6fe747b697f76926762190
parent59c5eea5c794ff3867504d2fba63bb535802027b (diff)
downloadfocaccia-qemu-14f1f86d5111ed2dae19ae15da81a98ea048017d.tar.gz
focaccia-qemu-14f1f86d5111ed2dae19ae15da81a98ea048017d.zip
hw/pci: Add pci_bus_add_fw_cfg_extra_pci_roots() helper
pci_bus_add_fw_cfg_extra_pci_roots() calls the fw_cfg
API with PCI bus specific arguments.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20241206181352.6836-5-philmd@linaro.org>
-rw-r--r--hw/pci/pci.c16
-rw-r--r--include/hw/pci/pci.h3
2 files changed, 19 insertions, 0 deletions
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 8844251ece..bf0a1840db 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -217,6 +217,22 @@ static uint16_t pcibus_numa_node(PCIBus *bus)
     return NUMA_NODE_UNASSIGNED;
 }
 
+bool pci_bus_add_fw_cfg_extra_pci_roots(FWCfgState *fw_cfg,
+                                        PCIBus *bus,
+                                        Error **errp)
+{
+    Object *obj;
+
+    if (!bus) {
+        return true;
+    }
+    obj = OBJECT(bus);
+
+    return fw_cfg_add_file_from_generator(fw_cfg, obj->parent,
+                                          object_get_canonical_path_component(obj),
+                                          "etc/extra-pci-roots", errp);
+}
+
 static GByteArray *pci_bus_fw_cfg_gen_data(Object *obj, Error **errp)
 {
     PCIBus *bus = PCI_BUS(obj);
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index c0717e3121..603c456c3a 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -297,6 +297,9 @@ int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
 uint32_t pci_bus_get_slot_reserved_mask(PCIBus *bus);
 void pci_bus_set_slot_reserved_mask(PCIBus *bus, uint32_t mask);
 void pci_bus_clear_slot_reserved_mask(PCIBus *bus, uint32_t mask);
+bool pci_bus_add_fw_cfg_extra_pci_roots(FWCfgState *fw_cfg,
+                                        PCIBus *bus,
+                                        Error **errp);
 /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
 static inline int pci_swizzle(int slot, int pin)
 {