diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-09-27 09:24:06 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-10-15 12:21:06 -0300 |
| commit | 805659a895b8afeeb50088c44bd60641d60963ff (patch) | |
| tree | 6f6965e61da2fe8bd1b363f536a3cdc1825ab330 | |
| parent | d70e58958da3165bb35d33a69c9d1937674dd6ce (diff) | |
| download | focaccia-qemu-805659a895b8afeeb50088c44bd60641d60963ff.tar.gz focaccia-qemu-805659a895b8afeeb50088c44bd60641d60963ff.zip | |
hw/mips/cps: Set the vCPU 'cpu-big-endian' property
Have the CPS expose a 'cpu-big-endian' property so it can set it to the vCPUs it creates. Note, since the number of vCPUs created is dynamic, we can not use QOM aliases. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-16-philmd@linaro.org>
| -rw-r--r-- | hw/mips/cps.c | 4 | ||||
| -rw-r--r-- | hw/mips/malta.c | 2 | ||||
| -rw-r--r-- | include/hw/mips/cps.h | 1 |
3 files changed, 7 insertions, 0 deletions
diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 07b73b0a1f..13046628cd 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -77,6 +77,9 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) MIPSCPU *cpu = MIPS_CPU(object_new(s->cpu_type)); CPUMIPSState *env = &cpu->env; + object_property_set_bool(OBJECT(cpu), "big-endian", s->cpu_is_bigendian, + &error_abort); + /* All VPs are halted on reset. Leave powering up to CPC. */ object_property_set_bool(OBJECT(cpu), "start-powered-off", true, &error_abort); @@ -167,6 +170,7 @@ static Property mips_cps_properties[] = { DEFINE_PROP_UINT32("num-vp", MIPSCPSState, num_vp, 1), DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256), DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type), + DEFINE_PROP_BOOL("cpu-big-endian", MIPSCPSState, cpu_is_bigendian, false), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 1df00c4bf9..964d3592da 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1054,6 +1054,8 @@ static void create_cps(MachineState *ms, MaltaState *s, object_initialize_child(OBJECT(s), "cps", &s->cps, TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), "cpu-type", ms->cpu_type, &error_fatal); + object_property_set_bool(OBJECT(&s->cps), "cpu-big-endian", + TARGET_BIG_ENDIAN, &error_abort); object_property_set_uint(OBJECT(&s->cps), "num-vp", ms->smp.cpus, &error_fatal); qdev_connect_clock_in(DEVICE(&s->cps), "clk-in", s->cpuclk); diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 04d636246a..05ef9f76b7 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -38,6 +38,7 @@ struct MIPSCPSState { uint32_t num_vp; uint32_t num_irq; char *cpu_type; + bool cpu_is_bigendian; MemoryRegion container; MIPSGCRState gcr; |