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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2025-03-19 07:13:34 +0100 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-05-19 13:30:24 +1000 |
| commit | cae44a92ab23811deeefa0a44b1bdec6cfa8e4b9 (patch) | |
| tree | 3276dabd7a631bf794d92516273d458f6550f9c3 | |
| parent | 4c1a39eebc6a9f1db816ff6c23e3d42ba52e2601 (diff) | |
| download | focaccia-qemu-cae44a92ab23811deeefa0a44b1bdec6cfa8e4b9.tar.gz focaccia-qemu-cae44a92ab23811deeefa0a44b1bdec6cfa8e4b9.zip | |
hw/riscv: More flexible FDT placement for MPFS
If the kernel entry is in the high DRAM area, place the FDT into this area. Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250319061342.26435-3-sebastian.huber@embedded-brains.de> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | hw/riscv/microchip_pfsoc.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index e39ee657cd..6bb44e3ac5 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -626,8 +626,15 @@ static void microchip_icicle_kit_machine_init(MachineState *machine) kernel_entry = boot_info.image_low_addr; /* Compute the fdt load address in dram */ - fdt_load_addr = riscv_compute_fdt_addr(memmap[MICROCHIP_PFSOC_DRAM_LO].base, - memmap[MICROCHIP_PFSOC_DRAM_LO].size, + hwaddr kernel_ram_base = memmap[MICROCHIP_PFSOC_DRAM_LO].base; + hwaddr kernel_ram_size = memmap[MICROCHIP_PFSOC_DRAM_LO].size; + + if (kernel_entry - kernel_ram_base >= kernel_ram_size) { + kernel_ram_base = memmap[MICROCHIP_PFSOC_DRAM_HI].base; + kernel_ram_size = mem_high_size; + } + + fdt_load_addr = riscv_compute_fdt_addr(kernel_ram_base, kernel_ram_size, machine, &boot_info); riscv_load_fdt(fdt_load_addr, machine->fdt); |