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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-01-17 07:42:53 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-01-17 07:42:53 +0100 |
| commit | 2195f20ba7d00f95f53f721be76266f4839f57ca (patch) | |
| tree | b7118d456f80f123b3e8f607dcbe9c92141d9d67 | |
| parent | 28285a330da5fd586e31dceb152a35c6171698ba (diff) | |
| download | miasm-2195f20ba7d00f95f53f721be76266f4839f57ca.tar.gz miasm-2195f20ba7d00f95f53f721be76266f4839f57ca.zip | |
Armt: fix cmn
| -rw-r--r-- | miasm2/arch/arm/arch.py | 5 | ||||
| -rw-r--r-- | test/arch/arm/arch.py | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py index b08d7940..e7054b51 100644 --- a/miasm2/arch/arm/arch.py +++ b/miasm2/arch/arm/arch.py @@ -3217,7 +3217,8 @@ armtop("mov", [bs('11101010010'), scc, bs('1111'), bs('0'), imm5_3, rd_nosppc, i armtop("orr", [bs('11110'), imm12_1, bs('00010'), scc, rn_nosppc, bs('0'), imm12_3, rd, imm12_8] ) -armtop("add", [bs('11110'), imm12_1, bs('01000'), scc, rn, bs('0'), imm12_3, rd, imm12_8], [rd, rn, imm12_8]) +armtop("add", [bs('11110'), imm12_1, bs('01000'), bs('0'), rn, bs('0'), imm12_3, rd_nopc, imm12_8], [rd_nopc, rn, imm12_8]) +armtop("adds",[bs('11110'), imm12_1, bs('01000'), bs('1'), rn, bs('0'), imm12_3, rd_nopc, imm12_8], [rd_nopc, rn, imm12_8]) armtop("bic", [bs('11110'), imm12_1, bs('00001'), scc, rn_nosppc, bs('0'), imm12_3, rd, imm12_8], [rd, rn_nosppc, imm12_8]) armtop("and", [bs('11110'), imm12_1, bs('00000'), scc, rn, bs('0'), imm12_3, rd_nopc, imm12_8], [rd_nopc, rn, imm12_8]) armtop("sub", [bs('11110'), imm12_1, bs('01101'), scc, rn, bs('0'), imm12_3, rd_nopc, imm12_8], [rd_nopc, rn, imm12_8]) @@ -3227,6 +3228,8 @@ armtop("cmp", [bs('11110'), imm12_1, bs('01101'), bs('1'), rn, bs('0'), imm12_3, armtop("cmp", [bs('11101011101'), bs('1'), rn, bs('0'), imm5_3, bs('1111'), imm5_2, imm_stype, rm_sh], [rn, rm_sh] ) +armtop("cmn", [bs('11110'), imm12_1, bs('01000'), bs('1'), rn, bs('0'), imm12_3, bs('1111'), imm12_8], [rn, imm12_8]) + armtop("mvn", [bs('11110'), imm12_1, bs('00011'), scc, bs('1111'), bs('0'), imm12_3, rd, imm12_8]) armtop("rsb", [bs('11110'), imm12_1, bs('01110'), scc, rn_nosppc, bs('0'), imm12_3, rd, imm12_8], [rd, rn_nosppc, imm12_8]) diff --git a/test/arch/arm/arch.py b/test/arch/arm/arch.py index c7d2961d..f86c3cfb 100644 --- a/test/arch/arm/arch.py +++ b/test/arch/arm/arch.py @@ -290,6 +290,8 @@ reg_tests_armt = [ "be42"), ("001845ea CMN R3, R0", "c342"), + ("XXXXXXXX CMN R0, 0x1", + "10F1010F"), ("001845ea ORRS R0, R4", "2043"), # muls |