IR/ir: rename ir to IntermediateRepresentation

13 files changed, 54 insertions, 34 deletions

diff --git a/miasm2/arch/aarch64/ira.py b/miasm2/arch/aarch64/ira.py
index 20a9a66c..e0dc8632 100644
--- a/miasm2/arch/aarch64/ira.py
+++ b/miasm2/arch/aarch64/ira.py
@@ -1,7 +1,7 @@
 #-*- coding:utf-8 -*-
 
 from miasm2.expression.expression import *
-from miasm2.ir.ir import ir, irbloc, AssignBlock
+from miasm2.ir.ir import AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.aarch64.sem import ir_aarch64l, ir_aarch64b
 from miasm2.arch.aarch64.regs import *
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py
index c3ed56d5..1d2ff4f1 100644
--- a/miasm2/arch/aarch64/sem.py
+++ b/miasm2/arch/aarch64/sem.py
@@ -1,5 +1,5 @@
 from miasm2.expression import expression as m2_expr
-from miasm2.ir.ir import ir, irbloc, AssignBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock
 from miasm2.arch.aarch64.arch import mn_aarch64, conds_expr, replace_regs
 from miasm2.arch.aarch64.regs import *
 from miasm2.core.sembuilder import SemBuilder
@@ -746,10 +746,10 @@ class aarch64info:
     # offset
 
 
-class ir_aarch64l(ir):
+class ir_aarch64l(IntermediateRepresentation):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_aarch64, "l", symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_aarch64, "l", symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = m2_expr.ExprId('IRDst', 64)
@@ -829,7 +829,7 @@ class ir_aarch64l(ir):
 class ir_aarch64b(ir_aarch64l):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_aarch64, "b", symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_aarch64, "b", symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = m2_expr.ExprId('IRDst', 64)
diff --git a/miasm2/arch/arm/ira.py b/miasm2/arch/arm/ira.py
index 8d659b58..7f5e8f1b 100644
--- a/miasm2/arch/arm/ira.py
+++ b/miasm2/arch/arm/ira.py
@@ -1,7 +1,7 @@
 #-*- coding:utf-8 -*-
 
 from miasm2.expression.expression import *
-from miasm2.ir.ir import ir, irbloc, AssignBlock
+from miasm2.ir.ir import IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.arm.sem import ir_arml, ir_armtl, ir_armb, ir_armtb
 from miasm2.arch.arm.regs import *
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py
index 742032e6..0ec02907 100644
--- a/miasm2/arch/arm/sem.py
+++ b/miasm2/arch/arm/sem.py
@@ -1,5 +1,5 @@
 from miasm2.expression.expression import *
-from miasm2.ir.ir import ir, IRBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock
 from miasm2.arch.arm.arch import mn_arm, mn_armt
 from miasm2.arch.arm.regs import *
 
@@ -1227,9 +1227,9 @@ class arminfo:
     # offset
 
 
-class ir_arml(ir):
+class ir_arml(IntermediateRepresentation):
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_arm, "l", symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_arm, "l", symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = ExprId('IRDst', 32)
@@ -1264,14 +1264,14 @@ class ir_arml(ir):
 
 class ir_armb(ir_arml):
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_arm, "b", symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_arm, "b", symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = ExprId('IRDst', 32)
 
-class ir_armtl(ir):
+class ir_armtl(IntermediateRepresentation):
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_armt, "l", symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_armt, "l", symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = ExprId('IRDst', 32)
@@ -1281,7 +1281,7 @@ class ir_armtl(ir):
 
 class ir_armtb(ir_armtl):
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_armt, "b", symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_armt, "b", symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = ExprId('IRDst', 32)
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py
index 6efbf8ae..67c5f2dc 100644
--- a/miasm2/arch/mips32/ira.py
+++ b/miasm2/arch/mips32/ira.py
@@ -1,7 +1,7 @@
 #-*- coding:utf-8 -*-
 
 from miasm2.expression.expression import *
-from miasm2.ir.ir import ir, IRBlock, AssignBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
 from miasm2.arch.mips32.regs import *
@@ -22,7 +22,7 @@ class ir_a_mips32l(ir_mips32l, ira):
         return irb_cur
 
     def post_add_bloc(self, bloc, ir_blocs):
-        ir.post_add_bloc(self, bloc, ir_blocs)
+        IntermediateRepresentation.post_add_bloc(self, bloc, ir_blocs)
         for irb in ir_blocs:
             pc_val = None
             lr_val = None
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index 74ad4f3e..cf760307 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -1,5 +1,5 @@
 import miasm2.expression.expression as m2_expr
-from miasm2.ir.ir import ir, IRBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock
 from miasm2.arch.mips32.arch import mn_mips32
 from miasm2.arch.mips32.regs import R_LO, R_HI, PC, RA
 from miasm2.core.sembuilder import SemBuilder
@@ -429,10 +429,10 @@ def get_mnemo_expr(ir, instr, *args):
     instr, extra_ir = mnemo_func[instr.name.lower()](ir, instr, *args)
     return instr, extra_ir
 
-class ir_mips32l(ir):
+class ir_mips32l(IntermediateRepresentation):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_mips32, 'l', symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_mips32, 'l', symbol_pool)
         self.pc = mn_mips32.getpc()
         self.sp = mn_mips32.getsp()
         self.IRDst = m2_expr.ExprId('IRDst', 32)
@@ -500,7 +500,7 @@ class ir_mips32l(ir):
 
 class ir_mips32b(ir_mips32l):
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_mips32, 'b', symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_mips32, 'b', symbol_pool)
         self.pc = mn_mips32.getpc()
         self.sp = mn_mips32.getsp()
         self.IRDst = m2_expr.ExprId('IRDst', 32)
diff --git a/miasm2/arch/msp430/ira.py b/miasm2/arch/msp430/ira.py
index 071bfae8..46b0b5c9 100644
--- a/miasm2/arch/msp430/ira.py
+++ b/miasm2/arch/msp430/ira.py
@@ -1,7 +1,7 @@
 #-*- coding:utf-8 -*-
 
 from miasm2.expression.expression import *
-from miasm2.ir.ir import ir, irbloc, AssignBlock
+from miasm2.ir.ir import IRBlock, AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.msp430.sem import ir_msp430
 from miasm2.arch.msp430.regs import *
diff --git a/miasm2/arch/msp430/sem.py b/miasm2/arch/msp430/sem.py
index 4b52361d..e8eb91cc 100644
--- a/miasm2/arch/msp430/sem.py
+++ b/miasm2/arch/msp430/sem.py
@@ -3,7 +3,7 @@
 from miasm2.expression.expression import *
 from miasm2.arch.msp430.regs import *
 from miasm2.arch.msp430.arch import mn_msp430
-from miasm2.ir.ir import ir
+from miasm2.ir.ir import IntermediateRepresentation
 
 
 # Utils
@@ -412,10 +412,10 @@ def ComposeExprAff(dst, src):
     return e
 
 
-class ir_msp430(ir):
+class ir_msp430(IntermediateRepresentation):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_msp430, None, symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_msp430, None, symbol_pool)
         self.pc = PC
         self.sp = SP
         self.IRDst = ExprId('IRDst', 16)
diff --git a/miasm2/arch/x86/ira.py b/miasm2/arch/x86/ira.py
index 31d38b37..5b80f5d5 100644
--- a/miasm2/arch/x86/ira.py
+++ b/miasm2/arch/x86/ira.py
@@ -3,7 +3,7 @@
 from miasm2.expression.expression import ExprAff, ExprOp, ExprId
 from miasm2.core.graph import DiGraph
 from miasm2.core.asmbloc import expr_is_label
-from miasm2.ir.ir import ir, irbloc, AssignBlock
+from miasm2.ir.ir import AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64
 
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index 50faf557..24b9487a 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -21,7 +21,7 @@ from miasm2.expression.simplifications import expr_simp
 from miasm2.arch.x86.regs import *
 from miasm2.arch.x86.arch import mn_x86, repeat_mn, replace_regs
 from miasm2.expression.expression_helper import expr_cmps, expr_cmpu
-from miasm2.ir.ir import ir, IRBlock
+from miasm2.ir.ir import IntermediateRepresentation, IRBlock
 from miasm2.core.sembuilder import SemBuilder
 import math
 import struct
@@ -4484,10 +4484,10 @@ mnemo_func = {'mov': mov,
               }
 
 
-class ir_x86_16(ir):
+class ir_x86_16(IntermediateRepresentation):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_x86, 16, symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_x86, 16, symbol_pool)
         self.do_stk_segm = False
         self.do_ds_segm = False
         self.do_str_segm = False
@@ -4622,7 +4622,7 @@ class ir_x86_16(ir):
 class ir_x86_32(ir_x86_16):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_x86, 32, symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_x86, 32, symbol_pool)
         self.do_stk_segm = False
         self.do_ds_segm = False
         self.do_str_segm = False
@@ -4636,7 +4636,7 @@ class ir_x86_32(ir_x86_16):
 class ir_x86_64(ir_x86_16):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_x86, 64, symbol_pool)
+        IntermediateRepresentation.__init__(self, mn_x86, 64, symbol_pool)
         self.do_stk_segm = False
         self.do_ds_segm = False
         self.do_str_segm = False
diff --git a/miasm2/ir/analysis.py b/miasm2/ir/analysis.py
index 11e6eebd..2108cc53 100644
--- a/miasm2/ir/analysis.py
+++ b/miasm2/ir/analysis.py
@@ -3,7 +3,7 @@
 import logging
 
 from miasm2.ir.symbexec import SymbolicExecutionEngine
-from miasm2.ir.ir import ir, AssignBlock
+from miasm2.ir.ir import IntermediateRepresentation, AssignBlock
 from miasm2.expression.expression \
     import ExprAff, ExprCond, ExprId, ExprInt, ExprMem, ExprOp
 
@@ -14,14 +14,17 @@ log.addHandler(console_handler)
 log.setLevel(logging.WARNING)
 
 
-class ira(ir):
+class ira(IntermediateRepresentation):
     """IR Analysis
     This class provides higher level manipulations on IR, such as dead
     instruction removals.
 
-    This class can be used as a common parent with `miasm2.ir.ir::ir` class.
+    This class can be used as a common parent with
+    `miasm2.ir.ir::IntermediateRepresentation` class.
+
     For instance:
         class ira_x86_16(ir_x86_16, ira)
+
     """
 
     def ira_regs_ids(self):
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py
index b06a8136..b993c356 100644
--- a/miasm2/ir/ir.py
+++ b/miasm2/ir/ir.py
@@ -320,7 +320,12 @@ class DiGraphIR(DiGraph):
         return super(DiGraphIR, self).dot()
 
 
-class ir(object):
+class IntermediateRepresentation(object):
+    """
+    Intermediate representation object
+
+    Allow native assembly to intermediate representation traduction
+    """
 
     def __init__(self, arch, attrib, symbol_pool=None):
         if symbol_pool is None:
@@ -602,3 +607,15 @@ class ir(object):
         if self._graph is None:
             self._gen_graph()
         return self._graph
+
+
+
+class ir(IntermediateRepresentation):
+    """
+    DEPRECATED object
+    Use IntermediateRepresentation instead of ir
+    """
+
+    def __init__(self, label, irs, lines=None):
+        warnings.warn('DEPRECATION WARNING: use "IntermediateRepresentation" instead of "ir"')
+        super(ir, self).__init__(label, irs, lines)
diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py
index e0407fdb..b5065722 100644
--- a/test/analysis/depgraph.py
+++ b/test/analysis/depgraph.py
@@ -3,7 +3,7 @@ from miasm2.expression.expression import ExprId, ExprInt32, ExprAff, ExprCond, \
     ExprInt
 from miasm2.core.asmbloc import asm_label
 from miasm2.ir.analysis import ira
-from miasm2.ir.ir import ir, IRBlock, AssignBlock
+from miasm2.ir.ir import IRBlock, AssignBlock
 from miasm2.core.graph import DiGraph
 from miasm2.analysis.depgraph import DependencyNode, DependencyGraph
 from itertools import count