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authorPierre LALET <pierre.lalet@cea.fr>2018-12-23 19:26:44 +0100
committerPierre LALET <pierre.lalet@cea.fr>2018-12-23 19:26:44 +0100
commit814ccf50314852d12168ad5b8a4a875a86bc6e3d (patch)
treee19e9820bb8355730ae9bd0c706e414e39c895ef
parent011e1e209b3d00afe3c8e65000209a568c5eb791 (diff)
downloadmiasm-814ccf50314852d12168ad5b8a4a875a86bc6e3d.tar.gz
miasm-814ccf50314852d12168ad5b8a4a875a86bc6e3d.zip
Fix typos & add codespell
-rw-r--r--.codespell_ignore6
-rw-r--r--.travis.yml2
-rw-r--r--CHANGELOG.md2
-rw-r--r--README.md2
-rw-r--r--example/disasm/dis_binary_ir.py2
-rw-r--r--example/disasm/dis_binary_ira.py2
-rw-r--r--example/disasm/full.py2
-rw-r--r--example/expression/access_c.py2
-rw-r--r--example/expression/basic_op.py2
-rw-r--r--example/expression/export_llvm.py4
-rw-r--r--example/expression/expr_c.py2
-rw-r--r--example/ida/ctype_propagation.py6
-rw-r--r--example/ida/graph_ir.py2
-rwxr-xr-xexample/jitter/arm_sc.py8
-rwxr-xr-xexample/jitter/example_types.py4
-rwxr-xr-xexample/jitter/mips32.py2
-rwxr-xr-xexample/jitter/msp430.py2
-rw-r--r--example/jitter/run_with_linuxenv.py4
-rw-r--r--example/symbol_exec/dse_crackme.py4
-rw-r--r--example/symbol_exec/dse_strategies.py6
-rw-r--r--example/symbol_exec/single_instr.py2
-rw-r--r--miasm2/analysis/binary.py4
-rw-r--r--miasm2/analysis/cst_propag.py8
-rw-r--r--miasm2/analysis/data_flow.py14
-rw-r--r--miasm2/analysis/depgraph.py4
-rw-r--r--miasm2/analysis/dse.py6
-rw-r--r--miasm2/analysis/machine.py2
-rw-r--r--miasm2/analysis/modularintervals.py2
-rw-r--r--miasm2/analysis/ssa.py8
-rw-r--r--miasm2/arch/aarch64/arch.py6
-rw-r--r--miasm2/arch/arm/arch.py4
-rw-r--r--miasm2/arch/arm/sem.py4
-rw-r--r--miasm2/arch/mep/arch.py6
-rw-r--r--miasm2/arch/mep/sem.py8
-rw-r--r--miasm2/arch/msp430/arch.py2
-rw-r--r--miasm2/arch/msp430/ctype.py2
-rw-r--r--miasm2/arch/sh4/arch.py2
-rw-r--r--miasm2/arch/x86/arch.py4
-rw-r--r--miasm2/arch/x86/ctype.py4
-rw-r--r--miasm2/arch/x86/sem.py34
-rw-r--r--miasm2/core/asmblock.py14
-rw-r--r--miasm2/core/cpu.py4
-rw-r--r--miasm2/core/ctypesmngr.py6
-rw-r--r--miasm2/core/graph.py12
-rw-r--r--miasm2/core/locationdb.py6
-rw-r--r--miasm2/core/objc.py34
-rw-r--r--miasm2/core/sembuilder.py2
-rw-r--r--miasm2/core/types.py20
-rw-r--r--miasm2/expression/expression.py16
-rw-r--r--miasm2/expression/expression_reduce.py6
-rw-r--r--miasm2/expression/simplifications_common.py6
-rw-r--r--miasm2/expression/simplifications_cond.py8
-rw-r--r--miasm2/ir/ir.py14
-rw-r--r--miasm2/ir/symbexec.py4
-rw-r--r--miasm2/ir/symbexec_top.py2
-rw-r--r--miasm2/ir/symbexec_types.py2
-rw-r--r--miasm2/ir/translators/smt2.py4
-rw-r--r--miasm2/ir/translators/z3_ir.py6
-rw-r--r--miasm2/jitter/arch/JitCore_aarch64.c4
-rw-r--r--miasm2/jitter/arch/JitCore_arm.c4
-rw-r--r--miasm2/jitter/arch/JitCore_mep.c4
-rw-r--r--miasm2/jitter/arch/JitCore_mips32.c4
-rw-r--r--miasm2/jitter/arch/JitCore_msp430.c4
-rw-r--r--miasm2/jitter/arch/JitCore_x86.c4
-rw-r--r--miasm2/jitter/codegen.py18
-rw-r--r--miasm2/jitter/emulatedsymbexec.py2
-rw-r--r--miasm2/jitter/jitcore_llvm.py6
-rw-r--r--miasm2/jitter/llvmconvert.py14
-rw-r--r--miasm2/jitter/loader/elf.py2
-rw-r--r--miasm2/jitter/loader/pe.py4
-rw-r--r--miasm2/os_dep/linux/environment.py6
-rw-r--r--miasm2/os_dep/win_api_x86_32.py22
-rw-r--r--miasm2/os_dep/win_api_x86_32_seh.py10
-rw-r--r--test/analysis/data_flow.py6
-rw-r--r--test/analysis/depgraph.py2
-rw-r--r--test/analysis/dse.py2
-rw-r--r--test/arch/mep/asm/test_major_opcode_0.py30
-rw-r--r--test/arch/mep/asm/test_major_opcode_1.py30
-rw-r--r--test/arch/mep/asm/test_major_opcode_10.py4
-rw-r--r--test/arch/mep/asm/test_major_opcode_11.py4
-rw-r--r--test/arch/mep/asm/test_major_opcode_12.py34
-rw-r--r--test/arch/mep/asm/test_major_opcode_13.py16
-rw-r--r--test/arch/mep/asm/test_major_opcode_14.py20
-rw-r--r--test/arch/mep/asm/test_major_opcode_15.py20
-rw-r--r--test/arch/mep/asm/test_major_opcode_2.py22
-rw-r--r--test/arch/mep/asm/test_major_opcode_3.py16
-rw-r--r--test/arch/mep/asm/test_major_opcode_4.py8
-rw-r--r--test/arch/mep/asm/test_major_opcode_5.py2
-rw-r--r--test/arch/mep/asm/test_major_opcode_6.py14
-rw-r--r--test/arch/mep/asm/test_major_opcode_7.py6
-rw-r--r--test/arch/mep/asm/test_major_opcode_8.py10
-rw-r--r--test/arch/mep/asm/test_major_opcode_9.py2
-rwxr-xr-xtest/core/test_types.py2
-rw-r--r--test/expression/simplifications.py2
-rw-r--r--test/jitter/test_post_instr.py2
-rw-r--r--test/os_dep/linux/test_env.py2
-rwxr-xr-xtest/test_all.py6
-rw-r--r--test/utils/testset.py8
98 files changed, 372 insertions, 364 deletions
diff --git a/.codespell_ignore b/.codespell_ignore
new file mode 100644
index 00000000..3724a1f4
--- /dev/null
+++ b/.codespell_ignore
@@ -0,0 +1,6 @@
+dum
+dont
+uint
+mye
+iff
+nto
diff --git a/.travis.yml b/.travis.yml
index e1b1debc..6aa9eb63 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -15,6 +15,8 @@ addons:
             - llvm-6.0-dev
             - g++-5
 before_script:
+# codespell
+- "pip install codespell && git ls-files | xargs codespell --ignore-words=.codespell_ignore 2>/dev/null"
 - "cd .."
 - "export LLVM_CONFIG=$(which llvm-config-6.0)"
 - "export CXX=$(which g++-5)"
diff --git a/CHANGELOG.md b/CHANGELOG.md
index dea3eb49..bdfdeadc 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -48,7 +48,7 @@
 - Better BigEndian handling in Miasm
 - Misleading name `EXCEPT_BREAKPOINT_INTERN` is renamed `EXCEPT_BREAKPOINT_MEMORY`
 - Gentoo compilation
-- Jitter memory page managment
+- Jitter memory page management
 - Sanitization of floats representation
 - Fix build on 32 bit machines
 - Fix DSE read/write bug
diff --git a/README.md b/README.md
index b75eeb44..5ac830d5 100644
--- a/README.md
+++ b/README.md
@@ -568,7 +568,7 @@ output).
 Windows & IDA
 -------------
 
-Most of Miasm's IDA plugins use a subset of Miasm functionnality.
+Most of Miasm's IDA plugins use a subset of Miasm functionality.
 A quick way to have them working is to add:
 * `elfesteem` directory and `pyparsing.py` to `C:\...\IDA\python\` or `pip install pyparsing elfesteem`
 * `miasm2/miasm2` directory to `C:\...\IDA\python\`
diff --git a/example/disasm/dis_binary_ir.py b/example/disasm/dis_binary_ir.py
index 6d98d692..197fccfd 100644
--- a/example/disasm/dis_binary_ir.py
+++ b/example/disasm/dis_binary_ir.py
@@ -21,7 +21,7 @@ asmcfg = mdis.dis_multiblock(addr)
 #    End common section             #
 #####################################
 
-# Get an IR convertor
+# Get an IR converter
 ir_arch = machine.ir(mdis.loc_db)
 
 # Get the IR of the asmcfg
diff --git a/example/disasm/dis_binary_ira.py b/example/disasm/dis_binary_ira.py
index c1bd5dc0..726f353e 100644
--- a/example/disasm/dis_binary_ira.py
+++ b/example/disasm/dis_binary_ira.py
@@ -21,7 +21,7 @@ asmcfg = mdis.dis_multiblock(addr)
 #    End common section             #
 #####################################
 
-# Get an IRA convertor
+# Get an IRA converter
 # The sub call are modelised by default operators
 # call_func_ret and call_func_stack
 ir_arch_analysis = machine.ira(mdis.loc_db)
diff --git a/example/disasm/full.py b/example/disasm/full.py
index 03094a55..7f4d4945 100644
--- a/example/disasm/full.py
+++ b/example/disasm/full.py
@@ -282,7 +282,7 @@ if args.propagexpr:
             return set(out.values())
 
 
-    # Add dummy dependecy to uncover out regs affectation
+    # Add dummy dependency to uncover out regs affectation
     for loc in ircfg_a.leaves():
         irblock = ircfg_a.blocks.get(loc)
         if irblock is None:
diff --git a/example/expression/access_c.py b/example/expression/access_c.py
index e8d5e318..b23ba81b 100644
--- a/example/expression/access_c.py
+++ b/example/expression/access_c.py
@@ -114,7 +114,7 @@ class MyCHandler(CHandler):
 
 
 data = open(sys.argv[1]).read()
-# Digest C informations
+# Digest C information
 text = """
 struct human {
         unsigned short age;
diff --git a/example/expression/basic_op.py b/example/expression/basic_op.py
index a9ed00e3..6032f483 100644
--- a/example/expression/basic_op.py
+++ b/example/expression/basic_op.py
@@ -15,7 +15,7 @@ c = ExprOp('+', a, b)
 print c
 # (eax + ebx)
 
-# + automaticaly generates ExprOp('+', a, b)
+# + automatically generates ExprOp('+', a, b)
 c = a + b
 print c
 # (eax + ebx)
diff --git a/example/expression/export_llvm.py b/example/expression/export_llvm.py
index 6f4ed591..a0af66b7 100644
--- a/example/expression/export_llvm.py
+++ b/example/expression/export_llvm.py
@@ -21,7 +21,7 @@ ircfg = ir.new_ircfg_from_asmcfg(asmcfg)
 ircfg.simplify(expr_simp_high_to_explicit)
 ######################################################
 
-# Instanciate a context and the function to fill
+# Instantiate a context and the function to fill
 context = LLVMContext_IRCompilation()
 context.ir_arch = ir
 
@@ -31,7 +31,7 @@ func.init_fc()
 
 # Here, as an example, we arbitrarily represent registers with global
 # variables. Locals allocas are used for the computation during the function,
-# and is finally saved in the aforementionned global variable.
+# and is finally saved in the aforementioned global variable.
 
 # In other words, for each registers:
 # entry:
diff --git a/example/expression/expr_c.py b/example/expression/expr_c.py
index ca92153a..e0825799 100644
--- a/example/expression/expr_c.py
+++ b/example/expression/expr_c.py
@@ -14,7 +14,7 @@ from miasm2.expression.expression import ExprId
 C manipulation example
 """
 
-# Digest C informations
+# Digest C information
 text = """
 struct line {
         char color[20];
diff --git a/example/ida/ctype_propagation.py b/example/ida/ctype_propagation.py
index 6a655fa8..1c883214 100644
--- a/example/ida/ctype_propagation.py
+++ b/example/ida/ctype_propagation.py
@@ -50,9 +50,9 @@ Analysis scope:
 <Architecture/compilator :{arch}>
 
 <##Header file          :{headerFile}>
-<Use a file for type informations:{rTypeFile}>{cTypeFile}>
-<##Types informations   :{typeFile}>
-<Types informations     :{strTypesInfo}>
+<Use a file for type information:{rTypeFile}>{cTypeFile}>
+<##Types information   :{typeFile}>
+<Types information     :{strTypesInfo}>
 
 <Unalias stack:{rUnaliasStack}>{cUnalias}>
 """, {
diff --git a/example/ida/graph_ir.py b/example/ida/graph_ir.py
index bc135ee2..b204b2b8 100644
--- a/example/ida/graph_ir.py
+++ b/example/ida/graph_ir.py
@@ -204,7 +204,7 @@ def build_graph(verbose=False, simplify=False, ssa=False, ssa_simplify=False):
                             out[reg] = dst
                 return set(out.values())
 
-        # Add dummy dependecy to uncover out regs affectation
+        # Add dummy dependency to uncover out regs affectation
         for loc in ircfg.leaves():
             irblock = ircfg.blocks.get(loc)
             if irblock is None:
diff --git a/example/jitter/arm_sc.py b/example/jitter/arm_sc.py
index 6644a440..7720ad68 100755
--- a/example/jitter/arm_sc.py
+++ b/example/jitter/arm_sc.py
@@ -9,18 +9,18 @@ from pdb import pm
 parser = Sandbox_Linux_arml_str.parser(description="""Sandbox an elf binary with arm engine
 (ex: jit_arm_sc.py example/demo_arm_l.bin)""")
 parser.add_argument("filename", help="string Filename")
-parser.add_argument("endianess", help="endianness [b/l]")
+parser.add_argument("endianness", help="endianness [b/l]")
 parser.add_argument('-v', "--verbose",
                     help="verbose mode", action="store_true")
 
 options = parser.parse_args()
 
-if options.endianess == 'b':
+if options.endianness == 'b':
     sandbox = Sandbox_Linux_armb_str
-elif options.endianess == 'l':
+elif options.endianness == 'l':
     sandbox = Sandbox_Linux_arml_str
 else:
-    raise ValueError("Bad endianess!")
+    raise ValueError("Bad endianness!")
 
 sb = sandbox(options.filename, options, globals())
 
diff --git a/example/jitter/example_types.py b/example/jitter/example_types.py
index 7ed964c2..bcf9bf70 100755
--- a/example/jitter/example_types.py
+++ b/example/jitter/example_types.py
@@ -10,7 +10,7 @@ from miasm2.core.types import MemStruct, Self, Void, Str, Array, Ptr, \
                               Num, Array, set_allocator
 from miasm2.os_dep.common import heap
 
-# Instanciate a heap
+# Instantiate a heap
 my_heap = heap()
 # And set it as the default memory allocator, to avoid manual allocation and
 # explicit address passing to the MemType subclasses (like MemStruct)
@@ -129,7 +129,7 @@ class DataArray(MemStruct):
     fields = [
         ("val1", Num("B")),
         ("val2", Num("B")),
-        # Ptr can also be instanciated with a Type instance as an argument, the
+        # Ptr can also be instantiated with a Type instance as an argument, the
         # corresponding Memtype will be returned when dereferencing
         # Here, data_array.array.deref will allow to access an Array
         ("arrayptr", Ptr("<I", Array(Num("B"), 16))),
diff --git a/example/jitter/mips32.py b/example/jitter/mips32.py
index 31ab03c8..70181a2a 100755
--- a/example/jitter/mips32.py
+++ b/example/jitter/mips32.py
@@ -18,7 +18,7 @@ parser.add_argument("-j", "--jitter",
                     help="Jitter engine (default is 'gcc')",
                     default="gcc")
 parser.add_argument("-d", "--debugging",
-                    help="Attach a CLI debugguer to the sandboxed programm",
+                    help="Attach a CLI debugguer to the sandboxed program",
                     action="store_true")
 parser.add_argument("binary",
                     help="binary to run")
diff --git a/example/jitter/msp430.py b/example/jitter/msp430.py
index 2f9b8649..36e45421 100755
--- a/example/jitter/msp430.py
+++ b/example/jitter/msp430.py
@@ -18,7 +18,7 @@ parser.add_argument("-j", "--jitter",
                     help="Jitter engine (default is 'gcc')",
                     default="gcc")
 parser.add_argument("-d", "--debugging",
-                    help="Attach a CLI debugguer to the sandboxed programm",
+                    help="Attach a CLI debugguer to the sandboxed program",
                     action="store_true")
 parser.add_argument("binary",
                     help="binary to run")
diff --git a/example/jitter/run_with_linuxenv.py b/example/jitter/run_with_linuxenv.py
index c9abe699..f4900a96 100644
--- a/example/jitter/run_with_linuxenv.py
+++ b/example/jitter/run_with_linuxenv.py
@@ -31,9 +31,9 @@ if cont_target_tmp.executable.Ehdr.type in [elf_csts.ET_REL, elf_csts.ET_DYN]:
 elif cont_target_tmp.executable.Ehdr.type == elf_csts.ET_EXEC:
     elf_base_addr = 0 # Not relocatable
 else:
-    raise ValueError("Unsuported type %d" % cont_target_tmp.executable.Ehdr.type)
+    raise ValueError("Unsupported type %d" % cont_target_tmp.executable.Ehdr.type)
 
-# Instanciate a jitter
+# Instantiate a jitter
 machine = Machine(cont_target_tmp.arch)
 jitter = machine.jitter(args.jitter)
 jitter.init_stack()
diff --git a/example/symbol_exec/dse_crackme.py b/example/symbol_exec/dse_crackme.py
index 22b6d9b1..37700d75 100644
--- a/example/symbol_exec/dse_crackme.py
+++ b/example/symbol_exec/dse_crackme.py
@@ -222,7 +222,7 @@ def xxx_puts_symb(dse):
 
 todo = set([""]) # Set of file content to test
 
-# Instanciate the DSE engine
+# Instantiate the DSE engine
 machine = Machine("x86_64")
 # Convert strategy to the correct value
 strategy = {
@@ -236,7 +236,7 @@ dse = DSEPathConstraint(machine, produce_solution=strategy)
 dse.attach(sb.jitter)
 
 # Update the jitter state: df is read, but never set
-# Approachs: specific or generic
+# Approaches: specific or generic
 # - Specific:
 #   df_value = ExprInt(sb.jitter.cpu.df, dse.ir_arch.arch.regs.df.size)
 #   dse.update_state({
diff --git a/example/symbol_exec/dse_strategies.py b/example/symbol_exec/dse_strategies.py
index 67b63aea..b38c797a 100644
--- a/example/symbol_exec/dse_strategies.py
+++ b/example/symbol_exec/dse_strategies.py
@@ -83,7 +83,7 @@ done = set()
 snapshot = dse.take_snapshot()
 
 # Only needed for the final output
-reachs = set()
+reaches = set()
 
 while todo:
     # Get the next candidate
@@ -122,8 +122,8 @@ while todo:
         # Display info and update storages
         print "\tARG = %s" % sol_expr
         todo.add(sol_expr)
-        reachs.add(sol_ident)
+        reaches.add(sol_ident)
 
 print "Found %d input, to reach %d element of coverage" % (len(done),
-                                                           len(reachs))
+                                                           len(reaches))
 
diff --git a/example/symbol_exec/single_instr.py b/example/symbol_exec/single_instr.py
index 2de2a72e..3b27a814 100644
--- a/example/symbol_exec/single_instr.py
+++ b/example/symbol_exec/single_instr.py
@@ -24,7 +24,7 @@ ira = machine.ira(mdis.loc_db)
 ircfg = ira.new_ircfg()
 ira.add_asmblock_to_ircfg(asm_block, ircfg)
 
-# Instanciate a Symbolic Execution engine with default value for registers
+# Instantiate a Symbolic Execution engine with default value for registers
 symb = SymbolicExecutionEngine(ira)
 
 # Emulate one IR basic block
diff --git a/miasm2/analysis/binary.py b/miasm2/analysis/binary.py
index 6dfef92a..90d71369 100644
--- a/miasm2/analysis/binary.py
+++ b/miasm2/analysis/binary.py
@@ -36,7 +36,7 @@ class Container(object):
 
     @classmethod
     def from_string(cls, data, *args, **kwargs):
-        """Instanciate a container and parse the binary
+        """Instantiate a container and parse the binary
         @data: str containing the binary
         """
         log.info('Load binary')
@@ -65,7 +65,7 @@ class Container(object):
 
     @classmethod
     def from_stream(cls, stream, *args, **kwargs):
-        """Instanciate a container and parse the binary
+        """Instantiate a container and parse the binary
         @stream: stream to use as binary
         @vm: (optional) VmMngr instance to link with the executable
         @addr: (optional) Shift to apply before parsing the binary. If set,
diff --git a/miasm2/analysis/cst_propag.py b/miasm2/analysis/cst_propag.py
index 43e83c4a..9a5e3d54 100644
--- a/miasm2/analysis/cst_propag.py
+++ b/miasm2/analysis/cst_propag.py
@@ -26,8 +26,8 @@ def add_state(ircfg, todo, states, addr, state):
     """
     Add or merge the computed @state for the block at @addr. Update @todo
     @todo: modified block set
-    @states: dictionnary linking a label to its entering state.
-    @addr: address of the concidered block
+    @states: dictionary linking a label to its entering state.
+    @addr: address of the considered block
     @state: computed state
     """
     addr = ircfg.get_loc_key(addr)
@@ -122,7 +122,7 @@ def compute_cst_propagation_states(ir_arch, ircfg, init_addr, init_infos):
 
     @ir_arch: IntermediateRepresentation instance
     @init_addr: analysis start address
-    @init_infos: dictionnary linking expressions to their values at @init_addr
+    @init_infos: dictionary linking expressions to their values at @init_addr
     """
 
     done = set()
@@ -169,7 +169,7 @@ def propagate_cst_expr(ir_arch, ircfg, addr, init_infos):
 
     @ir_arch: IntermediateRepresentation instance
     @addr: analysis start address
-    @init_infos: dictionnary linking expressions to their values at @init_addr
+    @init_infos: dictionary linking expressions to their values at @init_addr
 
     Returns a mapping between replaced Expression and their new values.
     """
diff --git a/miasm2/analysis/data_flow.py b/miasm2/analysis/data_flow.py
index 49519e9c..23e2f77e 100644
--- a/miasm2/analysis/data_flow.py
+++ b/miasm2/analysis/data_flow.py
@@ -28,7 +28,7 @@ class ReachingDefinitions(dict):
     A survey of data flow analysis techniques.
     IBM Thomas J. Watson Research Division,  Algorithm MK
 
-    This class is usable as a dictionnary whose struture is
+    This class is usable as a dictionary whose structure is
     { (block, index): { lvalue: set((block, index)) } }
     """
 
@@ -122,7 +122,7 @@ class DiGraphDefUse(DiGraph):
 
     def __init__(self, reaching_defs,
                  deref_mem=False, *args, **kwargs):
-        """Instanciate a DiGraph
+        """Instantiate a DiGraph
         @blocks: IR blocks
         """
         self._edge_attr = {}
@@ -171,7 +171,7 @@ class DiGraphDefUse(DiGraph):
 
     def add_uniq_labeled_edge(self, src, dst, edge_label):
         """Adds the edge (@src, @dst) with label @edge_label.
-        if edge (@src, @dst) already exists, the previous label is overriden
+        if edge (@src, @dst) already exists, the previous label is overridden
         """
         self.add_uniq_edge(src, dst)
         self._edge_attr[(src, dst)] = edge_label
@@ -216,7 +216,7 @@ def dead_simp_useful_assignblks(irarch, defuse, reaching_defs):
         else:
             keep_all_definitions = False
 
-        # Block has a nonexistant successor or is a leaf
+        # Block has a nonexistent successor or is a leaf
         if keep_all_definitions or (len(successors) == 0):
             valid_definitions = reaching_defs.get_definitions(block_lbl,
                                                               len(block))
@@ -831,7 +831,7 @@ def check_expr_below_stack(ir_arch_a, expr):
 def retrieve_stack_accesses(ir_arch_a, ssa):
     """
     Walk the ssa graph and find stack based variables.
-    Return a dictionnary linking stack base address to its size/name
+    Return a dictionary linking stack base address to its size/name
     @ir_arch_a: ira instance
     @ssa: SSADiGraph instance
     """
@@ -881,9 +881,9 @@ def retrieve_stack_accesses(ir_arch_a, ssa):
 
 def fix_stack_vars(expr, base_to_info):
     """
-    Replace local stack accesses in expr using informations in @base_to_info
+    Replace local stack accesses in expr using information in @base_to_info
     @expr: Expression instance
-    @base_to_info: dictionnary linking stack base address to its size/name
+    @base_to_info: dictionary linking stack base address to its size/name
     """
     if not expr.is_mem():
         return expr
diff --git a/miasm2/analysis/depgraph.py b/miasm2/analysis/depgraph.py
index 5923e7ed..62967991 100644
--- a/miasm2/analysis/depgraph.py
+++ b/miasm2/analysis/depgraph.py
@@ -279,7 +279,7 @@ class DependencyResult(DependencyState):
         """Symbolic execution of relevant nodes according to the history
         Return the values of inputs nodes' elements
         @ir_arch: IntermediateRepresentation instance
-        @ctx: (optional) Initial context as dictionnary
+        @ctx: (optional) Initial context as dictionary
         @step: (optional) Verbose execution
         Warning: The emulation is not sound if the inputs nodes depend on loop
         variant.
@@ -447,7 +447,7 @@ class DependencyGraph(object):
     A dependency graph contains DependencyNode as nodes. The oriented edges
     stand for a dependency.
     The dependency graph is made of the lines of a group of IRblock
-    *explicitely* or *implicitely* involved in the equation of given element.
+    *explicitly* or *implicitly* involved in the equation of given element.
     """
 
     def __init__(self, ircfg,
diff --git a/miasm2/analysis/dse.py b/miasm2/analysis/dse.py
index 1875f138..3a986537 100644
--- a/miasm2/analysis/dse.py
+++ b/miasm2/analysis/dse.py
@@ -35,7 +35,7 @@ If one is only interested in constraints associated to its path, the option
 The constraints are accumulated in the .z3_cur z3.Solver object.
 
 Here are a few remainings TODO:
- - handle endianess in check_state / atomic read: currently, but this is also
+ - handle endianness in check_state / atomic read: currently, but this is also
    true for others Miasm2 symbolic engines, the endianness is not take in
    account, and assumed to be Little Endian
 
@@ -143,7 +143,7 @@ class ESETrackModif(EmulatedSymbExec):
 class DSEEngine(object):
     """Dynamic Symbolic Execution Engine
 
-    This class aims to be overrided for each specific purpose
+    This class aims to be overridden for each specific purpose
     """
     SYMB_ENGINE = ESETrackModif
 
@@ -208,7 +208,7 @@ class DSEEngine(object):
             dse.attach(jitter)
             dse.update...
             ...
-            # Additionnal call to the exec callback is necessary, as breakpoints are
+            # Additional call to the exec callback is necessary, as breakpoints are
             # honored AFTER exec callback
             jitter.exec_cb(jitter)
 
diff --git a/miasm2/analysis/machine.py b/miasm2/analysis/machine.py
index 7b24328a..f12b7e57 100644
--- a/miasm2/analysis/machine.py
+++ b/miasm2/analysis/machine.py
@@ -2,7 +2,7 @@
 
 
 class Machine(object):
-    """Abstract machine architecture to restrict architecture dependant code"""
+    """Abstract machine architecture to restrict architecture dependent code"""
 
     __dis_engine = None   # Disassembly engine
     __mn = None           # Machine instance
diff --git a/miasm2/analysis/modularintervals.py b/miasm2/analysis/modularintervals.py
index 650dbc21..83890f19 100644
--- a/miasm2/analysis/modularintervals.py
+++ b/miasm2/analysis/modularintervals.py
@@ -7,7 +7,7 @@ class ModularIntervals(object):
     """Intervals with a maximum size, supporting modular arithmetic"""
 
     def __init__(self, size, intervals=None):
-        """Instanciate a ModularIntervals of size @size
+        """Instantiate a ModularIntervals of size @size
         @size: maximum size of elements
         @intervals: (optional) interval instance, or any type  supported by
                     interval initialisation; element of the current instance
diff --git a/miasm2/analysis/ssa.py b/miasm2/analysis/ssa.py
index 0320d117..c22aae59 100644
--- a/miasm2/analysis/ssa.py
+++ b/miasm2/analysis/ssa.py
@@ -579,7 +579,7 @@ class SSADiGraph(SSA):
 
 def get_assignblk(graph, loc, index):
     """
-    Return the dictionnary of the AssignBlock from @graph at location @loc at
+    Return the dictionary of the AssignBlock from @graph at location @loc at
     @index
     @graph: IRCFG instance
     @loc: Location instance
@@ -595,13 +595,13 @@ def get_assignblk(graph, loc, index):
 
 def set_assignblk(graph, loc, index, assignblk_dct):
     """
-    Set the Assignblock in @graph at location @loc at @index using dictionnary
+    Set the Assignblock in @graph at location @loc at @index using dictionary
     @assignblk_dct
 
     @graph: IRCFG instance
     @loc: Location instance
     @index: assignblock index
-    @assignblk_dct: dictionnary representing the AssignBlock
+    @assignblk_dct: dictionary representing the AssignBlock
     """
 
     irblock = graph.blocks[loc]
@@ -629,7 +629,7 @@ def remove_phi(ssa, head):
 
     all_ssa_vars = ssa._ssa_variable_to_expr
 
-    # Retrive Phi nodes
+    # Retrieve Phi nodes
     phi_nodes = []
     for irblock in ssa.graph.blocks.itervalues():
         for index, assignblk in enumerate(irblock):
diff --git a/miasm2/arch/aarch64/arch.py b/miasm2/arch/aarch64/arch.py
index 598aca83..38cffc47 100644
--- a/miasm2/arch/aarch64/arch.py
+++ b/miasm2/arch/aarch64/arch.py
@@ -444,7 +444,7 @@ class mn_aarch64(cls_mn):
             return 0
         o = 0
         if n > bs.getlen() * 8:
-            raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8))
+            raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8))
         while n:
             offset = start / 8
             n_offset = cls.endian_offset(attrib, offset)
@@ -1068,7 +1068,7 @@ class bits(object):
     __slots__ = ["size", "value"]
 
     def __init__(self, size, value):
-        """Instanciate a bitvector of size @size with value @value"""
+        """Instantiate a bitvector of size @size with value @value"""
         self.size = size
         if value & self.mask != value:
             raise ValueError("Value %s is too large for %d bits",
@@ -2065,7 +2065,7 @@ aarch64op("fmsub", [bs('0'), bs('00'), bs('11111'), bs('0'), sdsize1, bs('0'), s
 aarch64op("fnmadd",[bs('0'), bs('00'), bs('11111'), bs('0'), sdsize1, bs('1'), sdm_32_64, bs('0'), sda_32_64, sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64, sda_32_64])
 aarch64op("fnmsub",[bs('0'), bs('00'), bs('11111'), bs('0'), sdsize1, bs('1'), sdm_32_64, bs('1'), sda_32_64, sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64, sda_32_64])
 
-# convertion float integer p.235
+# conversion float integer p.235
 aarch64op("scvtf", [sf, bs('0'), bs('0'), bs('11110'), bs('0'), sdsize1, bs('1'), bs('00'), bs('010'), bs('000000'), rn, sdd_32_64], [sdd_32_64, rn])
 aarch64op("ucvtf", [sf, bs('0'), bs('0'), bs('11110'), bs('0'), sdsize1, bs('1'), bs('00'), bs('011'), bs('000000'), rn, sdd_32_64], [sdd_32_64, rn])
 
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py
index 5fbaa946..d4b7d05a 100644
--- a/miasm2/arch/arm/arch.py
+++ b/miasm2/arch/arm/arch.py
@@ -608,7 +608,7 @@ class mn_arm(cls_mn):
             return 0
         o = 0
         if n > bs.getlen() * 8:
-            raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8))
+            raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8))
         while n:
             offset = start / 8
             n_offset = cls.endian_offset(attrib, offset)
@@ -709,7 +709,7 @@ class mn_armt(cls_mn):
             return 0
         o = 0
         if n > bs.getlen() * 8:
-            raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8))
+            raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8))
         while n:
             offset = start / 8
             n_offset = cls.endian_offset(attrib, offset)
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py
index ac1d9ce9..4af177d2 100644
--- a/miasm2/arch/arm/sem.py
+++ b/miasm2/arch/arm/sem.py
@@ -778,7 +778,7 @@ def st_ld_r(ir, instr, a, a2, b, store=False, size=32, s_ext=False, z_ext=False)
     else:
         ad = base + off
 
-    # PC base lookup uses PC 4 byte alignemnt
+    # PC base lookup uses PC 4 byte alignment
     ad = ad.replace_expr({PC: PC & ExprInt(0xFFFFFFFC, 32)})
 
     dmem = False
@@ -1700,7 +1700,7 @@ class ir_arml(IntermediateRepresentation):
         cond_eq = tab_cond[cond_num]
 
         if not index + len(it_hints) <= len(block.lines):
-            raise NotImplementedError("Splitted IT block non supported yet")
+            raise NotImplementedError("Split IT block non supported yet")
 
         ir_blocks_all = []
 
diff --git a/miasm2/arch/mep/arch.py b/miasm2/arch/mep/arch.py
index 3cfa55a6..e4d66a63 100644
--- a/miasm2/arch/mep/arch.py
+++ b/miasm2/arch/mep/arch.py
@@ -313,7 +313,7 @@ class mn_mep(cls_mn):
     all_mn_inst = defaultdict(list)  # mnemonics objects
                                      # Note:
                                      #   - the key is the mnemonic Python class
-                                     #   - the data is an instanciated object
+                                     #   - the data is an instantiated object
 
     bintree = dict()  # Variable storing internal values used to guess a
                       # mnemonic during disassembly
@@ -321,7 +321,7 @@ class mn_mep(cls_mn):
     # Defines the instruction set that will be used
     instruction = instruction_mep
 
-    # Python module that stores registers informations
+    # Python module that stores registers information
     regs = mep_regs_module
 
     # Default delay slot
@@ -826,7 +826,7 @@ class mep_copro_reg_split(mep_copro_reg):
 
 
 class mep_deref_inc_reg(mep_deref_reg):
-    """Generic Toshiba MeP-c4 coprocess dereferenced & incremented registe
+    """Generic Toshiba MeP-c4 coprocess dereferenced & incremented register
     """
     parser = deref_inc_reg_parser
 
diff --git a/miasm2/arch/mep/sem.py b/miasm2/arch/mep/sem.py
index 9e0cba6b..fb67becd 100644
--- a/miasm2/arch/mep/sem.py
+++ b/miasm2/arch/mep/sem.py
@@ -265,18 +265,18 @@ def advck3(r0, rn, rm):
 
 @sbuild.parse
 def sub(reg1, reg2):
-    """SUB - Substract one register to another."""
+    """SUB - Subtract one register to another."""
 
     # Rn <- Rn - Rm
     reg1 = reg1 - reg2
 
 
 def sbvck3(ir, instr, r0, rn, rm):
-    """SBVCK3 - Check substraction overflow"""
+    """SBVCK3 - Check subtraction overflow"""
 
     # if(Overflow(Rn-Rm)) R0<-1 else R0<-0 (Signed)
 
-    # Substract registers
+    # Subtract registers
     reg_sub = ExprOp("+", rn, rm)
 
     # Get the register storing the highest value
@@ -1160,7 +1160,7 @@ class ir_mepb(IntermediateRepresentation):
         return instr_ir, extra_ir
 
     def get_next_break_loc_key(self, instr):
-        """Returns a new label that identifies where the instuction is going.
+        """Returns a new label that identifies where the instruction is going.
 
            Note: it eases linking IR blocs
         """
diff --git a/miasm2/arch/msp430/arch.py b/miasm2/arch/msp430/arch.py
index a8f75f39..f0db98f3 100644
--- a/miasm2/arch/msp430/arch.py
+++ b/miasm2/arch/msp430/arch.py
@@ -236,7 +236,7 @@ class mn_msp430(cls_mn):
             return 0
         o = 0
         if n > bs.getlen() * 8:
-            raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8))
+            raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8))
         while n:
             i = start / 8
             c = cls.getbytes(bs, i)
diff --git a/miasm2/arch/msp430/ctype.py b/miasm2/arch/msp430/ctype.py
index adb0a953..464adaf8 100644
--- a/miasm2/arch/msp430/ctype.py
+++ b/miasm2/arch/msp430/ctype.py
@@ -3,7 +3,7 @@ from miasm2.core.ctypesmngr import CTypeId, CTypePtr
 
 
 class CTypeMSP430_unk(CLeafTypes):
-    """Define C types sizes/alignement for msp430 architecture"""
+    """Define C types sizes/alignment for msp430 architecture"""
 
     obj_pad = ObjCDecl(PADDING_TYPE_NAME, 1, 1) # __padding__ is size 1/align 1
 
diff --git a/miasm2/arch/sh4/arch.py b/miasm2/arch/sh4/arch.py
index c6dea0d6..88d734a3 100644
--- a/miasm2/arch/sh4/arch.py
+++ b/miasm2/arch/sh4/arch.py
@@ -508,7 +508,7 @@ class mn_sh4(cls_mn):
             return 0
         o = 0
         if n > bs.getlen() * 8:
-            raise ValueError('not enought bits %r %r' % (n, len(bs.bin) * 8))
+            raise ValueError('not enough bits %r %r' % (n, len(bs.bin) * 8))
         while n:
             i = start / 8
             c = cls.getbytes(bs, i)
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index feafcd44..77744ccd 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -275,7 +275,7 @@ class x86_arg(m_arg):
             loc_key = loc_db.get_or_create_name_location(value.name)
             return ExprLoc(loc_key, size_hint)
         if isinstance(value, AstOp):
-            # First pass to retreive fixed_size
+            # First pass to retrieve fixed_size
             if value.op == "segm":
                 segm = self.asm_ast_to_expr(value.args[0], loc_db)
                 ptr = self.asm_ast_to_expr(value.args[1], loc_db, None, fixed_size)
@@ -930,7 +930,7 @@ class bs_modname_size(bs_divert):
                 (dct['mode'], dct['opmode'], dct['admode']))
             mode = dct['mode']
             size, opmode, admode = dct['mode'], dct['opmode'], dct['admode']
-            # no mode64 existance in name means no 64bit version of mnemo
+            # no mode64 exinstance in name means no 64bit version of mnemo
             if mode == 64:
                 if mode in self.args['name']:
                     nfields = fields[:]
diff --git a/miasm2/arch/x86/ctype.py b/miasm2/arch/x86/ctype.py
index 5e16f945..5d1be0de 100644
--- a/miasm2/arch/x86/ctype.py
+++ b/miasm2/arch/x86/ctype.py
@@ -3,7 +3,7 @@ from miasm2.core.ctypesmngr import CTypeId, CTypePtr
 
 
 class CTypeAMD64_unk(CLeafTypes):
-    """Define C types sizes/alignement for x86_64 architecture"""
+    """Define C types sizes/alignment for x86_64 architecture"""
 
     obj_pad = ObjCDecl(PADDING_TYPE_NAME, 1, 1) # __padding__ is size 1/align 1
 
@@ -72,7 +72,7 @@ class CTypeAMD64_unk(CLeafTypes):
 
 
 class CTypeX86_unk(CLeafTypes):
-    """Define C types sizes/alignement for x86_32 architecture"""
+    """Define C types sizes/alignment for x86_32 architecture"""
 
     obj_pad = ObjCDecl(PADDING_TYPE_NAME, 1, 1) # __padding__ is size 1/align 1
 
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index b8317ea7..244aff30 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -314,8 +314,8 @@ def fix_mem_args_size(instr, *args):
 
 def mem2double(instr, arg):
     """
-    Add float convertion if argument is an ExprMem
-    @arg: argument to tranform
+    Add float conversion if argument is an ExprMem
+    @arg: argument to transform
     """
     if isinstance(arg, m2_expr.ExprMem):
         if arg.size > 64:
@@ -341,8 +341,8 @@ def gen_jcc(ir, instr, cond, dst, jmp_if):
     Macro to generate jcc semantic
     @ir: ir instance
     @instr: instruction
-    @cond: condtion of the jcc
-    @dst: the dstination if jcc is taken
+    @cond: condition of the jcc
+    @dst: the destination if jcc is taken
     @jmp_if: jump if/notif cond
     """
 
@@ -733,7 +733,7 @@ def _shift_tpl(op, ir, instr, a, b, c=None, op_inv=None, left=False,
         isize = m2_expr.ExprInt(a.size, size=a.size)
         mask = m2_expr.ExprOp(op_inv, i1, (isize - shifter)) - i1
 
-        # An overflow can occured, emulate the 'undefined behavior'
+        # An overflow can occurred, emulate the 'undefined behavior'
         # Overflow behavior if (shift / size % 2)
         base_cond_overflow = shifter if left else (
             shifter - m2_expr.ExprInt(1, size=shifter.size))
@@ -755,7 +755,7 @@ def _shift_tpl(op, ir, instr, a, b, c=None, op_inv=None, left=False,
         cf_from_src = cf_from_src.msb() if left else cf_from_src[:1]
         new_cf = m2_expr.ExprCond(cond_overflow, cf_from_src, cf_from_dst)
 
-    # Overflow flag, only occured when shifter is equal to 1
+    # Overflow flag, only occurred when shifter is equal to 1
     if custom_of is None:
         value_of = a.msb() ^ a[-2:-1] if left else b[:1] ^ a.msb()
     else:
@@ -3641,12 +3641,12 @@ def movd(_, instr, dst, src):
 
 
 def movdqu(_, instr, dst, src):
-    # XXX TODO alignement check
+    # XXX TODO alignment check
     return [m2_expr.ExprAssign(dst, src)], []
 
 
 def movapd(_, instr, dst, src):
-    # XXX TODO alignement check
+    # XXX TODO alignment check
     return [m2_expr.ExprAssign(dst, src)], []
 
 
@@ -3899,7 +3899,7 @@ def _average(expr):
     arg1 = expr.args[0].zeroExtend(expr.size * 2)
     arg2 = expr.args[1].zeroExtend(expr.size * 2)
     one = m2_expr.ExprInt(1, arg1.size)
-    # avg(unsigned) = (a + b + 1) >> 1, addition beeing at least on one more bit
+    # avg(unsigned) = (a + b + 1) >> 1, addition being at least on one more bit
     return ((arg1 + arg2 + one) >> one)[:expr.size]
 
 pavgb = vec_vertical_instr('avg', 8, _average)
@@ -4843,7 +4843,7 @@ def _saturation_sub_unsigned(expr):
 def _saturation_sub_signed(expr):
     assert expr.is_op("+") and len(expr.args) == 2 and expr.args[-1].is_op("-")
 
-    # Compute the substraction on two more bits, see _saturation_sub_unsigned
+    # Compute the subtraction on two more bits, see _saturation_sub_unsigned
     arg1 = expr.args[0].signExtend(expr.size + 2)
     arg2 = expr.args[1].args[0].signExtend(expr.size + 2)
     return _signed_saturation(arg1 - arg2, expr.size)
@@ -4857,7 +4857,7 @@ def _saturation_add(expr):
     arg1 = expr.args[0].zeroExtend(expr.size + 1)
     arg2 = expr.args[1].zeroExtend(expr.size + 1)
 
-    # We can also use _unsigned_saturation with two additionnal bits (to
+    # We can also use _unsigned_saturation with two additional bits (to
     # distinguish minus and overflow case)
     # The resulting expression being more complicated with an impossible case
     # (signed=True), we rewrite the rule here
@@ -4868,7 +4868,7 @@ def _saturation_add(expr):
 def _saturation_add_signed(expr):
     assert expr.is_op("+") and len(expr.args) == 2
 
-    # Compute the substraction on two more bits, see _saturation_add_unsigned
+    # Compute the subtraction on two more bits, see _saturation_add_unsigned
 
     arg1 = expr.args[0].signExtend(expr.size + 2)
     arg2 = expr.args[1].signExtend(expr.size + 2)
@@ -5306,10 +5306,10 @@ mnemo_func = {'mov': mov,
               "movd": movd,
               "movdqu": movdqu,
               "movdqa": movdqu,
-              "movapd": movapd,  # XXX TODO alignement check
-              "movupd": movapd,  # XXX TODO alignement check
-              "movaps": movapd,  # XXX TODO alignement check
-              "movups": movapd,  # XXX TODO alignement check
+              "movapd": movapd,  # XXX TODO alignment check
+              "movupd": movapd,  # XXX TODO alignment check
+              "movaps": movapd,  # XXX TODO alignment check
+              "movups": movapd,  # XXX TODO alignment check
               "andps": andps,
               "andpd": andps,
               "andnps": andnps,
@@ -5600,7 +5600,7 @@ class ir_x86_16(IntermediateRepresentation):
         self.IRDst = m2_expr.ExprId('IRDst', 16)
         # Size of memory pointer access in IR
         # 16 bit mode memory accesses may be greater than 16 bits
-        # 32 bit size may be enought
+        # 32 bit size may be enough
         self.addrsize = 32
 
     def mod_pc(self, instr, instr_ir, extra_ir):
diff --git a/miasm2/core/asmblock.py b/miasm2/core/asmblock.py
index 34f11474..f6e68a0e 100644
--- a/miasm2/core/asmblock.py
+++ b/miasm2/core/asmblock.py
@@ -313,8 +313,8 @@ class AsmBlockBad(AsmBlock):
     }
 
     def __init__(self, loc_key=None, alignment=1, errno=ERROR_UNKNOWN, *args, **kwargs):
-        """Instanciate an AsmBlock_bad.
-        @loc_key, @alignement: same as AsmBlock.__init__
+        """Instantiate an AsmBlock_bad.
+        @loc_key, @alignment: same as AsmBlock.__init__
         @errno: (optional) specify a error type associated with the block
         """
         super(AsmBlockBad, self).__init__(loc_key, alignment, *args, **kwargs)
@@ -334,7 +334,7 @@ class AsmBlockBad(AsmBlock):
         raise RuntimeError("An AsmBlockBad cannot have bto")
 
     def split(self, *args, **kwargs):
-        raise RuntimeError("An AsmBlockBad cannot be splitted")
+        raise RuntimeError("An AsmBlockBad cannot be split")
 
 
 class asm_block_bad(AsmBlockBad):
@@ -486,7 +486,7 @@ class AsmCFG(DiGraph):
 
         Edges will be created for @block.bto, if destinations are already in
         this instance. If not, they will be resolved when adding these
-        aforementionned destinations.
+        aforementioned destinations.
         `self.pendings` indicates which blocks are not yet resolved.
 
         """
@@ -795,7 +795,7 @@ class AsmCFG(DiGraph):
                 if not (off > range_start and off < range_stop):
                     continue
 
-                # `cur_block` must be splitted at offset `off`from miasm2.core.locationdb import LocationDB
+                # `cur_block` must be split at offset `off`from miasm2.core.locationdb import LocationDB
 
                 new_b = cur_block.split(loc_db, off)
                 log_asmblock.debug("Split block %x", off)
@@ -1253,7 +1253,7 @@ def asmblock_final(mnemo, asmcfg, blockChains, loc_db, conservative=False):
             chain.fix_blocks(modified_loc_keys)
 
         for loc_key in modified_loc_keys:
-            # Retrive block with modified reference
+            # Retrieve block with modified reference
             mod_block = asmcfg.loc_key_to_block(loc_key)
             if mod_block is not None:
                 blocks_to_rework.add(mod_block)
@@ -1343,7 +1343,7 @@ class disasmEngine(object):
     """
 
     def __init__(self, arch, attrib, bin_stream, **kwargs):
-        """Instanciate a new disassembly engine
+        """Instantiate a new disassembly engine
         @arch: targeted architecture
         @attrib: architecture attribute
         @bin_stream: bytes source
diff --git a/miasm2/core/cpu.py b/miasm2/core/cpu.py
index 813ac47d..c2fbd3cd 100644
--- a/miasm2/core/cpu.py
+++ b/miasm2/core/cpu.py
@@ -44,7 +44,7 @@ class bitobj:
         if not n:
             return 0
         if n > len(self.bits) - self.offset:
-            raise ValueError('not enought bits %r %r' % (n, len(self.bits)))
+            raise ValueError('not enough bits %r %r' % (n, len(self.bits)))
         b = self.bits[self.offset:self.offset + n]
         b = int("".join([str(x) for x in b]), 2)
         self.offset += n
@@ -1063,7 +1063,7 @@ class cls_mn(object):
     __metaclass__ = metamn
     args_symb = []
     instruction = instruction
-    # Block's offset alignement
+    # Block's offset alignment
     alignment = 1
 
     @classmethod
diff --git a/miasm2/core/ctypesmngr.py b/miasm2/core/ctypesmngr.py
index 5daf8950..7dafd7e1 100644
--- a/miasm2/core/ctypesmngr.py
+++ b/miasm2/core/ctypesmngr.py
@@ -61,7 +61,7 @@ class CTypeId(CTypeBase):
 
     def __init__(self, *names):
         # Type specifier order does not matter
-        # so the cannonical form is ordered
+        # so the canonical form is ordered
         self.names = tuple(sorted(names))
         super(CTypeId, self).__init__()
 
@@ -372,7 +372,7 @@ class CAstTypes(object):
         }
 
     def gen_uniq_name(self):
-        """Generate uniq name for unamed strucs/union"""
+        """Generate uniq name for unnamed strucs/union"""
         cpt = self.cpt
         self.cpt += 1
         return self.INTERNAL_PREFIX + "%d" % cpt
@@ -554,7 +554,7 @@ class CAstTypes(object):
         elif isinstance(ast, c_ast.Constant):
             result = int(ast.value, 0)
         elif isinstance(ast, c_ast.Cast):
-            # TODO: Can trunc intergers?
+            # TODO: Can trunc integers?
             result = self.ast_eval_int(ast.expr)
         else:
             raise NotImplementedError("Not implemented!")
diff --git a/miasm2/core/graph.py b/miasm2/core/graph.py
index 35bcf01d..f61d1e67 100644
--- a/miasm2/core/graph.py
+++ b/miasm2/core/graph.py
@@ -301,8 +301,8 @@ class DiGraph(object):
         of the graph.
         @head: the head/leaf of the graph
         @reachable_cb: sons/parents of the head/leaf
-        @prev_cb: return predecessors/succesors of a node
-        @next_cb: return succesors/predecessors of a node
+        @prev_cb: return predecessors/successors of a node
+        @next_cb: return successors/predecessors of a node
         """
 
         nodes = set(reachable_cb(head))
@@ -382,7 +382,7 @@ class DiGraph(object):
         @node: The start node
         @gen_dominators: The dictionary containing at least node's
         dominators/post_dominators
-        @succ_cb: return predecessors/succesors of a node
+        @succ_cb: return predecessors/successors of a node
 
         """
         # Init
@@ -756,7 +756,7 @@ class MatchGraphJoker(object):
 
     def __init__(self, restrict_in=True, restrict_out=True, filt=None,
                  name=None):
-        """Instanciate a MatchGraphJoker, with restrictions
+        """Instantiate a MatchGraphJoker, with restrictions
         @restrict_in: (optional) if set, the number of predecessors of the
                       matched node must be the same than the joker node in the
                       associated MatchGraph
@@ -809,7 +809,7 @@ class MatchGraph(DiGraph):
     restrictions.
     The implemented algorithm is a naive approach.
 
-    The recommended way to instanciate a MatchGraph is the use of
+    The recommended way to instantiate a MatchGraph is the use of
     MatchGraphJoker.
     """
 
@@ -937,7 +937,7 @@ class MatchGraph(DiGraph):
         # Partial solution: nodes corrects, edges between these nodes corrects
         # A partial solution is a dictionary MatchGraphJoker -> @graph's node
         todo = list()  # Dictionnaries containing partial solution
-        done = list()  # Aleady computed partial solutions
+        done = list()  # Already computed partial solutions
 
         # Elect first candidates
         to_match = next(iter(self._nodes))
diff --git a/miasm2/core/locationdb.py b/miasm2/core/locationdb.py
index 7d84c491..b6e60794 100644
--- a/miasm2/core/locationdb.py
+++ b/miasm2/core/locationdb.py
@@ -13,7 +13,7 @@ class LocationDB(object):
     LocationDB is a "database" of information associated to location.
 
     An entry in a LocationDB is uniquely identified with a LocKey.
-    Additionnal information which can be associated with a LocKey are:
+    Additional information which can be associated with a LocKey are:
     - an offset (uniq per LocationDB)
     - several names (each are uniqs per LocationDB)
 
@@ -22,7 +22,7 @@ class LocationDB(object):
              1 <-> 0..n  name
 
     >>> loc_db = LocationDB()
-    # Add a location with no additionnal information
+    # Add a location with no additional information
     >>> loc_key1 = loc_db.add_location()
     # Add a location with an offset
     >>> loc_key2 = loc_db.add_location(offset=0x1234)
@@ -221,7 +221,7 @@ class LocationDB(object):
         if is_int(name):
             assert offset is None or offset == name
             warnings.warn("Deprecated API: use 'add_location(offset=)' instead."
-                          " An additionnal 'name=' can be provided to also "
+                          " An additional 'name=' can be provided to also "
                           "associate a name (there is no more default name)")
             offset = name
             name = None
diff --git a/miasm2/core/objc.py b/miasm2/core/objc.py
index 0e5e8cf4..64a935a7 100644
--- a/miasm2/core/objc.py
+++ b/miasm2/core/objc.py
@@ -716,7 +716,7 @@ def ast_get_c_access_expr(ast, expr_types, lvl=0):
     """Transform C ast object into a C Miasm expression
 
     @ast: parsed pycparser.c_ast object
-    @expr_types: a dictionnary linking ID names to their types
+    @expr_types: a dictionary linking ID names to their types
     @lvl: actual recursion level
 
     Example:
@@ -796,7 +796,7 @@ class ExprToAccessC(ExprReducer):
     def __init__(self, expr_types, types_mngr, enforce_strict_access=True):
         """Init GenCAccess
 
-        @expr_types: a dictionnary linking ID names to their types
+        @expr_types: a dictionary linking ID names to their types
         @types_mngr: types manager
         @enforce_strict_access: If false, generate access even on expression
         pointing to a middle of an object. If true, raise exception if such a
@@ -809,7 +809,7 @@ class ExprToAccessC(ExprReducer):
 
     def updt_expr_types(self, expr_types):
         """Update expr_types
-        @expr_types: Dictionnary associating name to type
+        @expr_types: Dictionary associating name to type
         """
 
         self.expr_types = expr_types
@@ -969,7 +969,7 @@ class ExprToAccessC(ExprReducer):
 
     def get_solo_type(self, node):
         """Return the type of the @node if it has only one possible type,
-        different from not None. In othe cases, return None.
+        different from not None. In other cases, return None.
         """
         if node.info is None or len(node.info) != 1:
             return None
@@ -1060,7 +1060,7 @@ class ExprToAccessC(ExprReducer):
     def get_accesses(self, expr, expr_context=None):
         """Generate C access(es) for the native Miasm expression @expr
         @expr: native Miasm expression
-        @expr_context: a dictionnary linking known expressions to their
+        @expr_context: a dictionary linking known expressions to their
         types. An expression is linked to a tuple of types.
         """
         if expr_context is None:
@@ -1115,7 +1115,7 @@ class ExprCToExpr(ExprReducer):
     def __init__(self, expr_types, types_mngr):
         """Init ExprCAccess
 
-        @expr_types: a dictionnary linking ID names to their types
+        @expr_types: a dictionary linking ID names to their types
         @types_mngr: types manager
         """
 
@@ -1124,7 +1124,7 @@ class ExprCToExpr(ExprReducer):
 
     def updt_expr_types(self, expr_types):
         """Update expr_types
-        @expr_types: Dictionnary associating name to type
+        @expr_types: Dictionary associating name to type
         """
 
         self.expr_types = expr_types
@@ -1330,7 +1330,7 @@ class ExprCToExpr(ExprReducer):
         """Translate a Miasm expression @expr (representing a C access) into a
         tuple composed of a native Miasm expression and its C type.
         @expr: Miasm expression (representing a C access)
-        @c_context: a dictionnary linking known tokens (strings) to their
+        @c_context: a dictionary linking known tokens (strings) to their
         types. A token is linked to only one type.
         """
         ret = self.reduce(expr, ctxt=c_context)
@@ -1597,7 +1597,7 @@ class CHandler(object):
 
     def updt_expr_types(self, expr_types):
         """Update expr_types
-        @expr_types: Dictionnary associating name to type
+        @expr_types: Dictionary associating name to type
         """
 
         self.expr_types = expr_types
@@ -1607,7 +1607,7 @@ class CHandler(object):
     def expr_to_c_access(self, expr, expr_context=None):
         """Generate the C access object(s) for a given native Miasm expression.
         @expr: Miasm expression
-        @expr_context: a dictionnary linking known expressions to a set of types
+        @expr_context: a dictionary linking known expressions to a set of types
         """
 
         if expr_context is None:
@@ -1618,7 +1618,7 @@ class CHandler(object):
     def expr_to_c_and_types(self, expr, expr_context=None):
         """Generate the C access string and corresponding type for a given
         native Miasm expression.
-        @expr_context: a dictionnary linking known expressions to a set of types
+        @expr_context: a dictionary linking known expressions to a set of types
         """
 
         accesses = set()
@@ -1629,7 +1629,7 @@ class CHandler(object):
 
     def expr_to_c(self, expr, expr_context=None):
         """Convert a Miasm @expr into it's C equivalent string
-        @expr_context: a dictionnary linking known expressions to a set of types
+        @expr_context: a dictionary linking known expressions to a set of types
         """
 
         return set(access[0]
@@ -1637,7 +1637,7 @@ class CHandler(object):
 
     def expr_to_types(self, expr, expr_context=None):
         """Get the possible types of the Miasm @expr
-        @expr_context: a dictionnary linking known expressions to a set of types
+        @expr_context: a dictionary linking known expressions to a set of types
         """
 
         return set(access.ctype
@@ -1647,7 +1647,7 @@ class CHandler(object):
         """Convert a C string expression to a Miasm expression and it's
         corresponding c type
         @c_str: C string
-        @c_context: a dictionnary linking known tokens (strings) to its type.
+        @c_context: a dictionary linking known tokens (strings) to its type.
         """
 
         ast = parse_access(c_str)
@@ -1657,7 +1657,7 @@ class CHandler(object):
     def c_to_expr(self, c_str, c_context):
         """Convert a C string expression to a Miasm expression
         @c_str: C string
-        @c_context: a dictionnary linking known tokens (strings) to its type.
+        @c_context: a dictionary linking known tokens (strings) to its type.
         """
 
         expr, _ = self.c_to_expr_and_type(c_str, c_context)
@@ -1666,7 +1666,7 @@ class CHandler(object):
     def c_to_type(self, c_str, c_context):
         """Get the type of a C string expression
         @expr: Miasm expression
-        @c_context: a dictionnary linking known tokens (strings) to its type.
+        @c_context: a dictionary linking known tokens (strings) to its type.
         """
 
         _, ctype = self.c_to_expr_and_type(c_str, c_context)
@@ -1674,5 +1674,5 @@ class CHandler(object):
 
 
 class CLeafTypes(object):
-    """Define C types sizes/alignement for a given architecture"""
+    """Define C types sizes/alignment for a given architecture"""
     pass
diff --git a/miasm2/core/sembuilder.py b/miasm2/core/sembuilder.py
index 67c6c257..5694ffa3 100644
--- a/miasm2/core/sembuilder.py
+++ b/miasm2/core/sembuilder.py
@@ -116,7 +116,7 @@ class SemBuilder(object):
 
     This class provides a decorator @parse to use on them.
     The context in which the function will be parsed must be supplied on
-    instanciation
+    instantiation
     """
 
     def __init__(self, ctx):
diff --git a/miasm2/core/types.py b/miasm2/core/types.py
index a60077ac..5d9a8d27 100644
--- a/miasm2/core/types.py
+++ b/miasm2/core/types.py
@@ -91,7 +91,7 @@ And access the fields:
 MemUnion and MemBitField can also be subclassed, the `fields` field being
 in the format expected by, respectively, Union and BitField.
 
-The `addr` argument can be omited if an allocator is set, in which case the
+The `addr` argument can be omitted if an allocator is set, in which case the
 structure will be automatically allocated in memory:
 
     my_heap = miasm2.os_dep.common.heap()
@@ -277,7 +277,7 @@ class Type(object):
         """Set a VmMngr memory from a value.
 
         @vm: VmMngr instance
-        @addr: the start adress in memory to set
+        @addr: the start address in memory to set
         @val: the python value to serialize in @vm at @addr
         """
         raw = self._pack(val)
@@ -293,7 +293,7 @@ class Type(object):
         """Returns a class with a (vm, addr) constructor that allows to
         interact with this type in memory.
 
-        In compilation terms, it returns a class allowing to instanciate an
+        In compilation terms, it returns a class allowing to instantiate an
         lvalue of this type.
 
         @return: a MemType subclass.
@@ -305,7 +305,7 @@ class Type(object):
         return pinned_type
 
     def _build_pinned_type(self):
-        """Builds the MemType subclass allowing to interract with this type.
+        """Builds the MemType subclass allowing to interact with this type.
 
         Called by self.lval when it is not in cache.
         """
@@ -419,7 +419,7 @@ class Ptr(Num):
             If a Type is given, it is transformed into a MemType with
             TheType.lval.
         *type_args, **type_kwargs: arguments to pass to the the pointed
-            MemType when instanciating it (e.g. for MemStr encoding or
+            MemType when instantiating it (e.g. for MemStr encoding or
             MemArray field_type).
         """
         if (not isinstance(dst_type, Type) and
@@ -490,7 +490,7 @@ class Ptr(Num):
         """
         # Sanity check
         if self.dst_type != val.get_type():
-            log.warning("Original type was %s, overriden by value of type %s",
+            log.warning("Original type was %s, overridden by value of type %s",
                         self._dst_type.__name__, val.__class__.__name__)
 
         # Actual job
@@ -980,7 +980,7 @@ class BitField(Union):
     """
 
     def __init__(self, backing_num, bit_list):
-        """@backing num: Num intance, @bit_list: [(name, n_bits)]"""
+        """@backing num: Num instance, @bit_list: [(name, n_bits)]"""
         self._num = backing_num
         fields = []
         offset = 0
@@ -1161,7 +1161,7 @@ class Self(Void):
     def _build_pinned_type(self):
         return MemSelf
 
-# To avoid reinstanciation when testing equality
+# To avoid reinstantiation when testing equality
 SELF_TYPE_INSTANCE = Self()
 VOID_TYPE_INSTANCE = Void()
 
@@ -1232,7 +1232,7 @@ class MemType(object):
 
     @classmethod
     def set_allocator(cls, alloc_func):
-        """Set an allocator for this class; allows to instanciate statically
+        """Set an allocator for this class; allows to instantiate statically
         sized MemTypes (i.e. sizeof() is implemented) without specifying the
         address (the object is allocated by @alloc_func in the vm).
 
@@ -1357,7 +1357,7 @@ class MemStruct(MemType):
     The mechanism is the following:
         - set a "fields" class field to be a list of
           (<field_name (str)>, <Type_subclass_instance>)
-        - instances of this class will have properties to interract with these
+        - instances of this class will have properties to interact with these
           fields.
 
     Example:
diff --git a/miasm2/expression/expression.py b/miasm2/expression/expression.py
index 4dc16f75..e7657860 100644
--- a/miasm2/expression/expression.py
+++ b/miasm2/expression/expression.py
@@ -108,7 +108,7 @@ def visit_chk(visitor):
 
 class DiGraphExpr(DiGraph):
 
-    """Enhanced graph for Expression diplay
+    """Enhanced graph for Expression display
     Expression are displayed as a tree with node and edge labeled
     with only relevant information"""
 
@@ -187,7 +187,7 @@ class Expr(object):
         raise ValueError('size is not mutable')
 
     def __init__(self, size):
-        """Instanciate an Expr with size @size
+        """Instantiate an Expr with size @size
         @size: int
         """
         # Common attribute
@@ -1343,7 +1343,7 @@ class ExprCompose(Expr):
     def is_compose(self):
         return True
 
-# Expression order for comparaison
+# Expression order for comparison
 EXPR_ORDER_DICT = {ExprId: 1,
                    ExprLoc: 2,
                    ExprCond: 3,
@@ -1416,7 +1416,7 @@ def compare_exprs(expr1, expr2):
         return cmp(expr1.size, expr2.size)
     elif cls1 == ExprAssign:
         raise NotImplementedError(
-            "Comparaison from an ExprAssign not yet implemented")
+            "Comparison from an ExprAssign not yet implemented")
     elif cls2 == ExprCond:
         ret = compare_exprs(expr1.cond, expr2.cond)
         if ret:
@@ -1447,7 +1447,7 @@ def compare_exprs(expr1, expr2):
     elif cls1 == ExprCompose:
         return compare_expr_list_compose(expr1.args, expr2.args)
     raise NotImplementedError(
-        "Comparaison between %r %r not implemented" % (expr1, expr2))
+        "Comparison between %r %r not implemented" % (expr1, expr2))
 
 
 def canonize_expr_list(expr_list):
@@ -1554,7 +1554,7 @@ def match_expr(expr, pattern, tks, result=None):
     """Try to match the @pattern expression with the pattern @expr with @tks jokers.
     Result is output dictionary with matching joker values.
     @expr : Expr pattern
-    @pattern : Targetted Expr to match
+    @pattern : Targeted Expr to match
     @tks : list of ExprId, available jokers
     @result : dictionary of ExprId -> Expr, output matching context
     """
@@ -1991,7 +1991,7 @@ def expr_is_sNaN(expr):
 def expr_is_float_lower(op1, op2):
     """Return 1 on 1 bit if @op1 < @op2, 0 otherwise.
     /!\ Assume @op1 and @op2 are not NaN
-    Comparision is the floating point one, defined in IEEE754
+    Comparison is the floating point one, defined in IEEE754
     """
     sign1, sign2 = op1.msb(), op2.msb()
     magn1, magn2 = op1[:-1], op2[:-1]
@@ -2005,7 +2005,7 @@ def expr_is_float_lower(op1, op2):
 def expr_is_float_equal(op1, op2):
     """Return 1 on 1 bit if @op1 == @op2, 0 otherwise.
     /!\ Assume @op1 and @op2 are not NaN
-    Comparision is the floating point one, defined in IEEE754
+    Comparison is the floating point one, defined in IEEE754
     """
     sign1, sign2 = op1.msb(), op2.msb()
     magn1, magn2 = op1[:-1], op2[:-1]
diff --git a/miasm2/expression/expression_reduce.py b/miasm2/expression/expression_reduce.py
index 0099dd78..adad552e 100644
--- a/miasm2/expression/expression_reduce.py
+++ b/miasm2/expression/expression_reduce.py
@@ -16,7 +16,7 @@ log_reduce.setLevel(logging.WARNING)
 
 
 class ExprNode(object):
-    """Clone of Expression object with additionnal information"""
+    """Clone of Expression object with additional information"""
 
     def __init__(self, expr):
         self.expr = expr
@@ -211,7 +211,7 @@ class ExprReducer(object):
         """Recursively apply rules to @node
 
         @node: ExprNode to analyze
-        @lvl: actual recusion level
+        @lvl: actual recursion level
         """
 
         expr = node.expr
@@ -267,7 +267,7 @@ class ExprReducer(object):
         """Find and apply reduction rules to @node
 
         @node: ExprNode to analyse
-        @lvl: actuel recusion level
+        @lvl: actuel recursion level
         """
 
         for rule in self.reduction_rules:
diff --git a/miasm2/expression/simplifications_common.py b/miasm2/expression/simplifications_common.py
index 7bdfd33b..6f0eb34a 100644
--- a/miasm2/expression/simplifications_common.py
+++ b/miasm2/expression/simplifications_common.py
@@ -23,7 +23,7 @@ def simp_cst_propagation(e_s, expr):
     op_name = expr.op
     # simpl integer manip
     # int OP int => int
-    # TODO: <<< >>> << >> are architecture dependant
+    # TODO: <<< >>> << >> are architecture dependent
     if op_name in op_propag_cst:
         while (len(args) >= 2 and
             args[-1].is_int() and
@@ -240,7 +240,7 @@ def simp_cst_propagation(e_s, expr):
 
         else:
             # Do not consider this case, too tricky (overflow on addition /
-            # substraction)
+            # subtraction)
             pass
 
     # A >> X >> Y  =>  A >> (X+Y) if X + Y does not overflow
@@ -284,7 +284,7 @@ def simp_cst_propagation(e_s, expr):
     # ! (!X + int) => X - int
     # TODO
 
-    # ((A & mask) >> shift) whith mask < 2**shift => 0
+    # ((A & mask) >> shift) with mask < 2**shift => 0
     if op_name == ">>" and args[1].is_int() and args[0].is_op("&"):
         if (args[0].args[1].is_int() and
             2 ** args[1].arg > args[0].args[1].arg):
diff --git a/miasm2/expression/simplifications_cond.py b/miasm2/expression/simplifications_cond.py
index f6b1ea8b..f1c224b7 100644
--- a/miasm2/expression/simplifications_cond.py
+++ b/miasm2/expression/simplifications_cond.py
@@ -1,8 +1,8 @@
 ################################################################################
 #
-# By choice, Miasm2 does not handle comparaison as a single operation, but with
-# operations corresponding to comparaison computation.
-# One may want to detect those comparaison; this library is designed to add them
+# By choice, Miasm2 does not handle comparison as a single operation, but with
+# operations corresponding to comparison computation.
+# One may want to detect those comparison; this library is designed to add them
 # in Miasm2 engine thanks to :
 # - Conditions computation in ExprOp
 # - Simplifications to catch known condition forms
@@ -132,7 +132,7 @@ def expr_simp_inverse(expr_simp, e):
                         to_match,
                         [jok1, jok2, jok_small])
 
-    # Check for 2 symetric cases
+    # Check for 2 symmetric cases
     if r is False:
         to_match = (ExprOp_inf_signed(jok1, jok2) ^ jok_small)
         r = __match_expr_wrap(e,
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py
index 16dffc79..72f775fb 100644
--- a/miasm2/ir/ir.py
+++ b/miasm2/ir/ir.py
@@ -48,7 +48,7 @@ class AssignBlock(object):
 
     -> Exchange between EBX and EAX
 
-    AssignBlock can be seen as a dictionnary where keys are the destinations
+    AssignBlock can be seen as a dictionary where keys are the destinations
     (ExprId or ExprMem), and values their corresponding sources.
 
     Also provides common manipulation on this assignments.
@@ -58,7 +58,7 @@ class AssignBlock(object):
 
     def __init__(self, irs=None, instr=None):
         """Create a new AssignBlock
-        @irs: (optional) sequence of ExprAssign, or dictionnary dst (Expr) -> src
+        @irs: (optional) sequence of ExprAssign, or dictionary dst (Expr) -> src
               (Expr)
         @instr: (optional) associate an instruction with this AssignBlock
 
@@ -109,7 +109,7 @@ class AssignBlock(object):
                 # prev_RAX = 0x1122334455667788
                 # input_RAX[0:8] = 0x89
                 # final_RAX -> ? (assignment are in parallel)
-                raise RuntimeError("Concurent access on same bit not allowed")
+                raise RuntimeError("Concurrent access on same bit not allowed")
 
             # Consider slice grouping
             expr_list = [(new_dst, new_src),
@@ -126,7 +126,7 @@ class AssignBlock(object):
             for i, (_, stop) in enumerate(known_intervals[:-1]):
                 if stop > known_intervals[i + 1][0]:
                     raise RuntimeError(
-                        "Concurent access on same bit not allowed")
+                        "Concurrent access on same bit not allowed")
 
             # Fill with missing data
             missing_i = get_missing_interval(known_intervals, 0, new_dst.size)
@@ -202,7 +202,7 @@ class AssignBlock(object):
     @staticmethod
     def get_modified_slice(dst, src):
         """Return an Expr list of extra expressions needed during the
-        object instanciation"""
+        object instantiation"""
         if not isinstance(src, m2_expr.ExprCompose):
             raise ValueError("Get mod slice not on expraff slice", str(src))
         modified_s = []
@@ -220,7 +220,7 @@ class AssignBlock(object):
         return set(self.keys())
 
     def get_rw(self, mem_read=False, cst_read=False):
-        """Return a dictionnary associating written expressions to a set of
+        """Return a dictionary associating written expressions to a set of
         their read requirements
         @mem_read: (optional) mem_read argument of `get_r`
         @cst_read: (optional) cst_read argument of `get_r`
@@ -471,7 +471,7 @@ class IRCFG(DiGraph):
     """DiGraph for IR instances"""
 
     def __init__(self, irdst, loc_db, blocks=None, *args, **kwargs):
-        """Instanciate a IRCFG
+        """Instantiate a IRCFG
         @loc_db: LocationDB instance
         @blocks: IR blocks
         """
diff --git a/miasm2/ir/symbexec.py b/miasm2/ir/symbexec.py
index 052736ee..a1ffebf5 100644
--- a/miasm2/ir/symbexec.py
+++ b/miasm2/ir/symbexec.py
@@ -81,7 +81,7 @@ class SymbolicState(StateEngine):
 
     @property
     def symbols(self):
-        """Return the dictionnary of known symbols"""
+        """Return the dictionary of known symbols"""
         return dict(self._symbols)
 
 
@@ -945,7 +945,7 @@ class SymbolicExecutionEngine(object):
     def eval_expr(self, expr, eval_cache=None):
         """
         Evaluate @expr
-        @expr: Expresion instance to evaluate
+        @expr: Expression instance to evaluate
         @cache: None or dictionary linking variables to their values
         """
         if eval_cache is None:
diff --git a/miasm2/ir/symbexec_top.py b/miasm2/ir/symbexec_top.py
index f5ecb566..887ebe59 100644
--- a/miasm2/ir/symbexec_top.py
+++ b/miasm2/ir/symbexec_top.py
@@ -68,7 +68,7 @@ class SymbolicStateTop(StateEngine):
 
     @property
     def symbols(self):
-        """Return the dictionnary of known symbols"""
+        """Return the dictionary of known symbols"""
         return dict(self._symbols)
 
     @property
diff --git a/miasm2/ir/symbexec_types.py b/miasm2/ir/symbexec_types.py
index 2b7643ca..7580d1f8 100644
--- a/miasm2/ir/symbexec_types.py
+++ b/miasm2/ir/symbexec_types.py
@@ -51,7 +51,7 @@ class SymbolicStateCTypes(StateEngine):
 
     @property
     def symbols(self):
-        """Return the dictionnary of known symbols'types"""
+        """Return the dictionary of known symbols'types"""
         return dict(self._symbols)
 
 
diff --git a/miasm2/ir/translators/smt2.py b/miasm2/ir/translators/smt2.py
index 802481fe..eda24bb7 100644
--- a/miasm2/ir/translators/smt2.py
+++ b/miasm2/ir/translators/smt2.py
@@ -47,7 +47,7 @@ class SMT2Mem(object):
         try:
             mem = self.mems[size]
         except KeyError:
-            # Lazy instanciation
+            # Lazy instantiation
             self.mems[size] = self.name + str(size)
             mem = self.mems[size]
         return mem
@@ -105,7 +105,7 @@ class TranslatorSMT2(Translator):
     expression. Memory is abstracted via SMT2Mem.
     The result of from_expr will be an SMT2 expression.
 
-    If you want to interract with the memory abstraction after the translation,
+    If you want to interact with the memory abstraction after the translation,
     you can instantiate your own SMT2Mem that will be equivalent to the one
     used by TranslatorSMT2.
 
diff --git a/miasm2/ir/translators/z3_ir.py b/miasm2/ir/translators/z3_ir.py
index 1cc8c29d..d43468ef 100644
--- a/miasm2/ir/translators/z3_ir.py
+++ b/miasm2/ir/translators/z3_ir.py
@@ -50,7 +50,7 @@ class Z3Mem(object):
         try:
             mem = self.mems[size]
         except KeyError:
-            # Lazy instanciation
+            # Lazy instantiation
             self.mems[size] = z3.Array(self.name + str(size),
                                         z3.BitVecSort(size),
                                         z3.BitVecSort(8))
@@ -104,8 +104,8 @@ class TranslatorZ3(Translator):
     expression. Memory is abstracted via z3.Array (see Z3Mem).
     The result of from_expr will be a z3 Expr.
 
-    If you want to interract with the memory abstraction after the translation,
-    you can instanciate your own Z3Mem, that will be equivalent to the one
+    If you want to interact with the memory abstraction after the translation,
+    you can instantiate your own Z3Mem, that will be equivalent to the one
     used by TranslatorZ3.
     """
 
diff --git a/miasm2/jitter/arch/JitCore_aarch64.c b/miasm2/jitter/arch/JitCore_aarch64.c
index 76452a44..fc51848a 100644
--- a/miasm2/jitter/arch/JitCore_aarch64.c
+++ b/miasm2/jitter/arch/JitCore_aarch64.c
@@ -141,8 +141,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_arm.c b/miasm2/jitter/arch/JitCore_arm.c
index ac7d16bf..4f1fd254 100644
--- a/miasm2/jitter/arch/JitCore_arm.c
+++ b/miasm2/jitter/arch/JitCore_arm.c
@@ -115,8 +115,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_mep.c b/miasm2/jitter/arch/JitCore_mep.c
index da070016..44f36290 100644
--- a/miasm2/jitter/arch/JitCore_mep.c
+++ b/miasm2/jitter/arch/JitCore_mep.c
@@ -172,8 +172,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
         if (found)
             continue;
-        fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-        RAISE(PyExc_ValueError, "unkown reg");
+        fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+        RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_mips32.c b/miasm2/jitter/arch/JitCore_mips32.c
index 2a5dfd0f..1c2854aa 100644
--- a/miasm2/jitter/arch/JitCore_mips32.c
+++ b/miasm2/jitter/arch/JitCore_mips32.c
@@ -131,8 +131,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_msp430.c b/miasm2/jitter/arch/JitCore_msp430.c
index 7072a380..12a42782 100644
--- a/miasm2/jitter/arch/JitCore_msp430.c
+++ b/miasm2/jitter/arch/JitCore_msp430.c
@@ -113,8 +113,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_x86.c b/miasm2/jitter/arch/JitCore_x86.c
index 1782c5ae..b711f40b 100644
--- a/miasm2/jitter/arch/JitCore_x86.c
+++ b/miasm2/jitter/arch/JitCore_x86.c
@@ -256,8 +256,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py
index e8177ab5..32af29a2 100644
--- a/miasm2/jitter/codegen.py
+++ b/miasm2/jitter/codegen.py
@@ -132,9 +132,9 @@ class CGen(object):
         return self.translator.from_expr(self.patch_c_id(expr))
 
     def add_label_index(self, dst2index, loc_key):
-        """Insert @lbl to the dictionnary @dst2index with a uniq value
+        """Insert @lbl to the dictionary @dst2index with a uniq value
         @dst2index: LocKey -> uniq value
-        @loc_key: LocKey istance"""
+        @loc_key: LocKey instance"""
 
         if loc_key not in dst2index:
             dst2index[loc_key] = len(dst2index)
@@ -183,9 +183,9 @@ class CGen(object):
 
     def add_local_var(self, dst_var, dst_index, expr):
         """
-        Add local varaible used to store temporay result
-        @dst_var: dictionnary of Expr -> local_var_expr
-        @dst_index : dictionnary of size -> local var count
+        Add local variable used to store temporay result
+        @dst_var: dictionary of Expr -> local_var_expr
+        @dst_index : dictionary of size -> local var count
         @expr: Expression source
         """
         size = expr.size
@@ -202,7 +202,7 @@ class CGen(object):
     def get_mem_prefetch(self, assignblk):
         """
         Generate temporary variables used to fetch memory used in the @assignblk
-        Return a dictionnary: ExprMem -> temporary variable
+        Return a dictionary: ExprMem -> temporary variable
         @assignblk: AssignBlock instance
         """
         mem_index = {8: 0, 16: 0, 32: 0, 64: 0, 128:0}
@@ -224,7 +224,7 @@ class CGen(object):
 
     def gen_c_assignments(self, assignblk):
         """
-        Return C informations used to generate the C code of the @assignblk
+        Return C information used to generate the C code of the @assignblk
         @assignblk: an AssignBlock instance
         """
         c_var = []
@@ -256,7 +256,7 @@ class CGen(object):
             elif isinstance(dst, ExprId):
                 new_dst = self.add_local_var(dst_var, dst_index, dst)
                 if dst in self.ir_arch.arch.regs.regs_flt_expr:
-                    # Dont mask float affectation
+                    # Don't mask float affectation
                     c_main.append(
                         '%s = (%s);' % (self.id_to_c(new_dst), self.id_to_c(src)))
                 elif new_dst.size <= self.translator.NATIVE_INT_MAX_SIZE:
@@ -321,7 +321,7 @@ class CGen(object):
     def traverse_expr_dst(self, expr, dst2index):
         """
         Generate the index of the destination label for the @expr
-        @dst2index: dictionnary to link label to its index
+        @dst2index: dictionary to link label to its index
         """
 
         if isinstance(expr, ExprCond):
diff --git a/miasm2/jitter/emulatedsymbexec.py b/miasm2/jitter/emulatedsymbexec.py
index 6e1bfe65..15024505 100644
--- a/miasm2/jitter/emulatedsymbexec.py
+++ b/miasm2/jitter/emulatedsymbexec.py
@@ -21,7 +21,7 @@ class EmulatedSymbExec(SymbolicExecutionEngine):
     }
 
     def __init__(self, cpu, vm, *args, **kwargs):
-        """Instanciate an EmulatedSymbExec, associated to CPU @cpu and bind
+        """Instantiate an EmulatedSymbExec, associated to CPU @cpu and bind
         memory accesses.
         @cpu: JitCpu instance
         """
diff --git a/miasm2/jitter/jitcore_llvm.py b/miasm2/jitter/jitcore_llvm.py
index 6c7d47ac..463e476a 100644
--- a/miasm2/jitter/jitcore_llvm.py
+++ b/miasm2/jitter/jitcore_llvm.py
@@ -10,7 +10,7 @@ import platform
 class JitCore_LLVM(jitcore.JitCore):
     "JiT management, using LLVM as backend"
 
-    # Architecture dependant libraries
+    # Architecture dependent libraries
     arch_dependent_libs = {"x86": "JitCore_x86",
                            "arm": "JitCore_arm",
                            "msp430": "JitCore_msp430",
@@ -46,7 +46,7 @@ class JitCore_LLVM(jitcore.JitCore):
         # Library to load within Jit context
         libs_to_load = []
 
-        # Get architecture dependant Jitcore library (if any)
+        # Get architecture dependent Jitcore library (if any)
         lib_dir = os.path.dirname(os.path.realpath(__file__))
         lib_dir = os.path.join(lib_dir, 'arch')
         ext = '.so' if platform.system() != 'Windows' else '.pyd'
@@ -66,7 +66,7 @@ class JitCore_LLVM(jitcore.JitCore):
         # Save the current architecture parameters
         self.arch = self.ir_arch.arch
 
-        # Get the correspondance between registers and vmcpu struct
+        # Get the correspondence between registers and vmcpu struct
         mod_name = "miasm2.jitter.arch.JitCore_%s" % (self.ir_arch.arch.name)
         mod = importlib.import_module(mod_name)
         self.context.set_vmcpu(mod.get_gpreg_offset_all())
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py
index 04dc2d2b..6f024c1e 100644
--- a/miasm2/jitter/llvmconvert.py
+++ b/miasm2/jitter/llvmconvert.py
@@ -76,7 +76,7 @@ class LLVMContext():
         llvm.initialize_native_target()
         llvm.initialize_native_asmprinter()
 
-        # Initilize target for compilation
+        # Initialize target for compilation
         target = llvm.Target.from_default_triple()
         self.target_machine = target.create_target_machine()
         self.init_exec_engine()
@@ -320,7 +320,7 @@ class LLVMContext_JIT(LLVMContext):
                     readonly=True)
 
     def set_vmcpu(self, lookup_table):
-        "Set the correspondance between register name and vmcpu offset"
+        "Set the correspondence between register name and vmcpu offset"
 
         self.vmcpu = lookup_table
 
@@ -450,7 +450,7 @@ class LLVMContext_JIT(LLVMContext):
 
     def get_ptr_from_cache(self, file_name, func_name):
         "Load @file_name and return a pointer on the jitter @func_name"
-        # We use an empty module to avoid loosing time on function building
+        # We use an empty module to avoid losing time on function building
         empty_module = llvm.parse_assembly("")
         empty_module.fname_out = file_name
 
@@ -1399,8 +1399,8 @@ class LLVMFunction(object):
     def gen_irblock(self, instr_attrib, attributes, instr_offsets, irblock):
         """
         Generate the code for an @irblock
-        @instr_attrib: an Attributs instance or the instruction to translate
-        @attributes: list of Attributs corresponding to irblock assignments
+        @instr_attrib: an Attributes instance or the instruction to translate
+        @attributes: list of Attributes corresponding to irblock assignments
         @instr_offsets: offset of all asmblock's instructions
         @irblock: an irblock instance
         """
@@ -1610,7 +1610,7 @@ class LLVMFunction(object):
                 new_irblock = self.llvm_context.ir_arch.irbloc_fix_regs_for_mode(
                     irblock, self.llvm_context.ir_arch.attrib)
 
-                # Set the builder at the begining of the correct bbl
+                # Set the builder at the beginning of the correct bbl
                 self.builder.position_at_end(self.get_basic_block_by_loc_key(new_irblock.loc_key))
 
                 if index == 0:
@@ -1695,7 +1695,7 @@ class LLVMFunction_IRCompilation(LLVMFunction):
     >>> func.ret_type = llvm_ir.VoidType()
     >>> func.init_fc()
     >>>
-    >>> # Insert here function additionnal inits
+    >>> # Insert here function additional inits
     >>> XX = func.builder.alloca(...)
     >>> func.local_vars_pointers["EAX"] = XX
     >>> #
diff --git a/miasm2/jitter/loader/elf.py b/miasm2/jitter/loader/elf.py
index d1df8c3f..b94a9309 100644
--- a/miasm2/jitter/loader/elf.py
+++ b/miasm2/jitter/loader/elf.py
@@ -146,7 +146,7 @@ def fill_loc_db_with_symbols(elf, loc_db, base_addr=0):
 
 
 def apply_reloc_x86(elf, vm, section, base_addr, loc_db):
-    """Apply relocation for x86 ELF contained in the secion @section
+    """Apply relocation for x86 ELF contained in the section @section
     @elf: elfesteem's ELF instance
     @vm: VmMngr instance
     @section: elf's section containing relocation to perform
diff --git a/miasm2/jitter/loader/pe.py b/miasm2/jitter/loader/pe.py
index e4cd57ee..176e0065 100644
--- a/miasm2/jitter/loader/pe.py
+++ b/miasm2/jitter/loader/pe.py
@@ -126,7 +126,7 @@ def vm_load_pe(vm, fdata, align_s=True, load_hdr=True, name="", **kargs):
     @load_hdr: (optional) If False, do not load the NThdr in memory
     Return the corresponding PE instance.
 
-    Extra arguments are passed to PE instanciation.
+    Extra arguments are passed to PE instantiation.
     If all sections are aligned, they will be mapped on several different pages
     Otherwise, a big page is created, containing all sections
     """
@@ -167,7 +167,7 @@ def vm_load_pe(vm, fdata, align_s=True, load_hdr=True, name="", **kargs):
                 )
                 section.offset = section.addr
 
-            # Last section alignement
+            # Last section alignment
             last_section = pe.SHList[-1]
             last_section.size = (last_section.size + 0xfff) & 0xfffff000
 
diff --git a/miasm2/os_dep/linux/environment.py b/miasm2/os_dep/linux/environment.py
index 4f125563..7cafae43 100644
--- a/miasm2/os_dep/linux/environment.py
+++ b/miasm2/os_dep/linux/environment.py
@@ -322,7 +322,7 @@ class LinuxEnvironment(object):
     """A LinuxEnvironment regroups information to simulate a Linux-like
     environment"""
 
-    # To be overrided
+    # To be overridden
     platform_arch = None
 
     # User information
@@ -655,13 +655,13 @@ class AuxVec(object):
     AT_SYSINFO_EHDR = 33
 
     def __init__(self, elf_phdr_vaddr, entry_point, linux_env, **kwargs):
-        """Instanciate an AuxVec, with required elements:
+        """Instantiate an AuxVec, with required elements:
         - elf_phdr_vaddr: virtual address of the ELF's PHDR in memory
         - entry_point: virtual address of the ELF entry point
         - linux_env: LinuxEnvironment instance, used to provides some of the
           option values
 
-        Others options can be overrided by named arguments
+        Others options can be overridden by named arguments
 
         """
         self.info = {
diff --git a/miasm2/os_dep/win_api_x86_32.py b/miasm2/os_dep/win_api_x86_32.py
index 25e98d4b..5d6e4765 100644
--- a/miasm2/os_dep/win_api_x86_32.py
+++ b/miasm2/os_dep/win_api_x86_32.py
@@ -2559,8 +2559,8 @@ def msvcrt_wcslen(jitter):
     jitter.func_ret_cdecl(ret_ad, len(s))
 
 def kernel32_SetFilePointer(jitter):
-    ret_ad, args = jitter.func_args_stdcall(["hwnd", "distance",
-                                             "p_distance_high",
+    ret_ad, args = jitter.func_args_stdcall(["hwnd", "dinstance",
+                                             "p_dinstance_high",
                                              "movemethod"])
 
     if args.hwnd == winobjs.module_cur_hwnd:
@@ -2572,22 +2572,22 @@ def kernel32_SetFilePointer(jitter):
 
     # data = None
     if args.hwnd in winobjs.files_hwnd:
-        winobjs.files_hwnd[winobjs.module_cur_hwnd].seek(args.distance, args.movemethod)
+        winobjs.files_hwnd[winobjs.module_cur_hwnd].seek(args.dinstance, args.movemethod)
     elif args.hwnd in winobjs.handle_pool:
         wh = winobjs.handle_pool[args.hwnd]
-        wh.info.seek(args.distance, args.movemethod)
+        wh.info.seek(args.dinstance, args.movemethod)
     else:
         raise ValueError('unknown filename')
-    jitter.func_ret_stdcall(ret_ad, args.distance)
+    jitter.func_ret_stdcall(ret_ad, args.dinstance)
 
 
 def kernel32_SetFilePointerEx(jitter):
-    ret_ad, args = jitter.func_args_stdcall(["hwnd", "distance_l",
-                                             "distance_h",
+    ret_ad, args = jitter.func_args_stdcall(["hwnd", "dinstance_l",
+                                             "dinstance_h",
                                              "pnewfileptr",
                                              "movemethod"])
-    distance = args.distance_l | (args.distance_h << 32)
-    if distance:
+    dinstance = args.dinstance_l | (args.dinstance_h << 32)
+    if dinstance:
         raise ValueError('Not implemented')
     if args.pnewfileptr:
         raise ValueError('Not implemented')
@@ -2600,10 +2600,10 @@ def kernel32_SetFilePointerEx(jitter):
 
     # data = None
     if args.hwnd in winobjs.files_hwnd:
-        winobjs.files_hwnd[winobjs.module_cur_hwnd].seek(distance, args.movemethod)
+        winobjs.files_hwnd[winobjs.module_cur_hwnd].seek(dinstance, args.movemethod)
     elif args.hwnd in winobjs.handle_pool:
         wh = winobjs.handle_pool[args.hwnd]
-        wh.info.seek(distance, args.movemethod)
+        wh.info.seek(dinstance, args.movemethod)
     else:
         raise ValueError('unknown filename')
     jitter.func_ret_stdcall(ret_ad, 1)
diff --git a/miasm2/os_dep/win_api_x86_32_seh.py b/miasm2/os_dep/win_api_x86_32_seh.py
index 110f2b34..be524895 100644
--- a/miasm2/os_dep/win_api_x86_32_seh.py
+++ b/miasm2/os_dep/win_api_x86_32_seh.py
@@ -85,7 +85,7 @@ MAX_SEH = 5
 
 def build_teb(jitter, teb_address):
     """
-    Build TEB informations using following structure:
+    Build TEB information using following structure:
 
     @jitter: jitter instance
     @teb_address: the TEB address
@@ -111,7 +111,7 @@ def build_teb(jitter, teb_address):
 
 def build_peb(jitter, peb_address):
     """
-    Build PEB informations using following structure:
+    Build PEB information using following structure:
 
     @jitter: jitter instance
     @peb_address: the PEB address
@@ -135,7 +135,7 @@ def build_peb(jitter, peb_address):
 
 def build_ldr_data(jitter, modules_info):
     """
-    Build Loader informations using following structure:
+    Build Loader information using following structure:
 
     +0x000 Length                          : Uint4B
     +0x004 Initialized                     : UChar
@@ -232,7 +232,7 @@ def create_modules_chain(jitter, name2module):
     out = ""
     for i, (fname, pe_obj) in enumerate(name2module.items(), 1):
         if pe_obj is None:
-            log.warning("Unknown module: ommited from link list (%r)",
+            log.warning("Unknown module: omitted from link list (%r)",
                         fname)
             continue
         addr = base_addr + i * 0x1000
@@ -368,7 +368,7 @@ def fix_InInitializationOrderModuleList(jitter, modules_info):
 
 def add_process_env(jitter):
     """
-    Build a process environement structure
+    Build a process environment structure
     @jitter: jitter instance
     """
 
diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py
index 53c9b01b..8682119d 100644
--- a/test/analysis/data_flow.py
+++ b/test/analysis/data_flow.py
@@ -217,7 +217,7 @@ for irb in [G5_EXP_IRB0, G5_EXP_IRB1, G5_EXP_IRB2,
             G5_EXP_IRB3, G5_EXP_IRB4, G5_EXP_IRB5]:
     G5_EXP_IRA.add_irblock(irb)
 
-# graph 6 : Natural loop with dead variables symetric affectation
+# graph 6 : Natural loop with dead variables symmetric affectation
 # (a = b <-> b = a )
 
 G6_IRA = IRA.new_ircfg()
@@ -344,7 +344,7 @@ G9_EXP_IRB4 = gen_irblock(LBL4, [[], [ExprAssign(r, b)]])
 for irb in [G9_EXP_IRB0, G9_EXP_IRB1, G9_EXP_IRB2, G9_EXP_IRB3, G9_EXP_IRB4]:
     G9_EXP_IRA.add_irblock(irb)
 
-# graph 10 : Natural loop with alive variables symetric affectation
+# graph 10 : Natural loop with alive variables symmetric affectation
 # (a = b <-> b = a )
 
 G10_IRA = IRA.new_ircfg()
@@ -660,7 +660,7 @@ G17_EXP_IRB0 = gen_irblock(LBL0, [[],
 for irb in [G17_EXP_IRB0]:
     G17_EXP_IRA.add_irblock(irb)
 
-# Begining  of tests
+# Beginning  of tests
 
 for test_nb, test in enumerate([(G1_IRA, G1_EXP_IRA),
                                 (G2_IRA, G2_EXP_IRA),
diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py
index 0d909ba2..4d9aa322 100644
--- a/test/analysis/depgraph.py
+++ b/test/analysis/depgraph.py
@@ -220,7 +220,7 @@ def dg2graph(graph, label=False, lines=True):
     return '\n'.join(out)
 
 
-print "   [+] Test dictionnary equality"
+print "   [+] Test dictionary equality"
 DNA = DependencyNode(LBL2, A, 0)
 DNB = DependencyNode(LBL1, B, 1)
 DNC = DependencyNode(LBL1, C, 0)
diff --git a/test/analysis/dse.py b/test/analysis/dse.py
index a05d8595..344b9108 100644
--- a/test/analysis/dse.py
+++ b/test/analysis/dse.py
@@ -125,7 +125,7 @@ class DSEAttachInBreakpoint(DSETest):
             self._regs.EBX: self._testid,
         })
 
-        # Additionnal call to the exec callback is necessary, as breakpoints are
+        # Additional call to the exec callback is necessary, as breakpoints are
         # honored AFTER exec callback
         jitter.exec_cb(jitter)
 
diff --git a/test/arch/mep/asm/test_major_opcode_0.py b/test/arch/mep/asm/test_major_opcode_0.py
index d517850a..69a9685c 100644
--- a/test/arch/mep/asm/test_major_opcode_0.py
+++ b/test/arch/mep/asm/test_major_opcode_0.py
@@ -16,7 +16,7 @@ class TestMajor0:
         check_instruction("MOV $1, $8", "0180")
         check_instruction("MOV $1, $TP", "01d0")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MOV $3, $7", "0370")
         check_instruction("MOV $0, $SP", "00f0")
         check_instruction("MOV $5, $SP", "05f0")
@@ -33,7 +33,7 @@ class TestMajor0:
         check_instruction("NEG $0, $0", "0001")
         check_instruction("NEG $0, $8", "0081")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("NEG $6, $6", "0661")
         check_instruction("NEG $9, $5", "0951")
         check_instruction("NEG $11, $12", "0bc1")
@@ -50,7 +50,7 @@ class TestMajor0:
         check_instruction("SLT3 $0, $0, $0", "0002")
         check_instruction("SLT3 $0, $0, $8", "0082")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLT3 $0, $2, $4", "0242")
         check_instruction("SLT3 $0, $SP, $2", "0f22")
         check_instruction("SLT3 $0, $5, $9", "0592")
@@ -67,7 +67,7 @@ class TestMajor0:
         check_instruction("SLTU3 $0, $12, $0", "0c03")
         check_instruction("SLTU3 $0, $4, $3", "0433")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLTU3 $0, $5, $TP", "05d3")
         check_instruction("SLTU3 $0, $2, $5", "0253")
         check_instruction("SLTU3 $0, $SP, $TP", "0fd3")
@@ -84,7 +84,7 @@ class TestMajor0:
         check_instruction("SUB $4, $3", "0434")
         check_instruction("SUB $0, $8", "0084")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SUB $11, $9", "0b94")
         check_instruction("SUB $9, $9", "0994")
         check_instruction("SUB $TP, $2", "0d24")
@@ -101,7 +101,7 @@ class TestMajor0:
         check_instruction("SBVCK3 $0, $0, $6", "0065")
         check_instruction("SBVCK3 $0, $0, $12", "00c5")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SBVCK3 $0, $0, $5", "0055")
         check_instruction("SBVCK3 $0, $4, $8", "0485")
         check_instruction("SBVCK3 $0, $4, $1", "0415")
@@ -124,7 +124,7 @@ class TestMajor0:
         check_instruction("ADVCK3 $0, $0, $0", "0007")
         check_instruction("ADVCK3 $0, $0, $12", "00c7")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("ADVCK3 $0, $3, $9", "0397")
         check_instruction("ADVCK3 $0, $10, $7", "0a77")
         check_instruction("ADVCK3 $0, $1, $5", "0157")
@@ -141,7 +141,7 @@ class TestMajor0:
         check_instruction("SB $12, ($4)", "0c48")
         check_instruction("SB $12, ($11)", "0cb8")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SB $4, ($4)", "0448")
         check_instruction("SB $10, ($8)", "0a88")
         check_instruction("SB $7, ($6)", "0768")
@@ -158,7 +158,7 @@ class TestMajor0:
         check_instruction("SH $0, ($2)", "0029")
         check_instruction("SH $0, ($12)", "00c9")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SH $GP, ($12)", "0ec9")
         check_instruction("SH $6, ($10)", "06a9")
         check_instruction("SH $10, ($11)", "0ab9")
@@ -175,7 +175,7 @@ class TestMajor0:
         check_instruction("SW $12, ($SP)", "0cfa")
         check_instruction("SW $0, ($SP)", "00fa")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SW $0, ($7)", "007a")
         check_instruction("SW $4, ($12)", "04ca")
         check_instruction("SW $12, ($7)", "0c7a")
@@ -192,7 +192,7 @@ class TestMajor0:
         check_instruction("LBU $12, ($4)", "0c4b")
         check_instruction("LBU $0, ($4)", "004b")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LBU $6, ($TP)", "06db")
         check_instruction("LBU $11, ($SP)", "0bfb")
         check_instruction("LBU $10, ($10)", "0aab")
@@ -209,7 +209,7 @@ class TestMajor0:
         check_instruction("LB $10, ($4)", "0a4c")
         check_instruction("LB $12, ($TP)", "0cdc")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LB $0, ($12)", "00cc")
         check_instruction("LB $2, ($7)", "027c")
         check_instruction("LB $5, ($7)", "057c")
@@ -226,7 +226,7 @@ class TestMajor0:
         check_instruction("LH $0, ($12)", "00cd")
         check_instruction("LH $10, ($0)", "0a0d")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LH $0, ($GP)", "00ed")
         check_instruction("LH $12, ($5)", "0c5d")
         check_instruction("LH $0, ($3)", "003d")
@@ -243,7 +243,7 @@ class TestMajor0:
         check_instruction("LW $0, ($12)", "00ce")
         check_instruction("LW $1, ($SP)", "01fe")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LW $1, ($0)", "010e")
         check_instruction("LW $7, ($12)", "07ce")
         check_instruction("LW $TP, ($2)", "0d2e")
@@ -260,7 +260,7 @@ class TestMajor0:
         check_instruction("LHU $12, ($8)", "0c8f")
         check_instruction("LHU $12, ($4)", "0c4f")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LHU $5, ($11)", "05bf")
         check_instruction("LHU $12, ($3)", "0c3f")
         check_instruction("LHU $9, ($8)", "098f")
diff --git a/test/arch/mep/asm/test_major_opcode_1.py b/test/arch/mep/asm/test_major_opcode_1.py
index acdb9ca2..c401bfd2 100644
--- a/test/arch/mep/asm/test_major_opcode_1.py
+++ b/test/arch/mep/asm/test_major_opcode_1.py
@@ -16,7 +16,7 @@ class TestMajor1:
         check_instruction("OR $0, $11", "10b0")
         check_instruction("OR $0, $12", "10c0")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("OR $1, $12", "11c0")
         check_instruction("OR $6, $11", "16b0")
         check_instruction("OR $10, $9", "1a90")
@@ -33,7 +33,7 @@ class TestMajor1:
         check_instruction("AND $12, $11", "1cb1")
         check_instruction("AND $0, $0", "1001")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("AND $6, $12", "16c1")
         check_instruction("AND $8, $6", "1861")
         check_instruction("AND $1, $12", "11c1")
@@ -50,7 +50,7 @@ class TestMajor1:
         check_instruction("XOR $4, $0", "1402")
         check_instruction("XOR $11, $12", "1bc2")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("XOR $0, $12", "10c2")
         check_instruction("XOR $12, $1", "1c12")
         check_instruction("XOR $SP, $10", "1fa2")
@@ -67,7 +67,7 @@ class TestMajor1:
         check_instruction("NOR $11, $0", "1b03")
         check_instruction("NOR $0, $0", "1003")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("NOR $4, $1", "1413")
         check_instruction("NOR $11, $11", "1bb3")
         check_instruction("NOR $9, $9", "1993")
@@ -84,7 +84,7 @@ class TestMajor1:
         check_instruction("MUL $10, $9", "1a94")
         check_instruction("MUL $10, $3", "1a34")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MUL $2, $2", "1224")
         check_instruction("MUL $4, $12", "14c4")
         check_instruction("MUL $9, $3", "1934")
@@ -101,7 +101,7 @@ class TestMajor1:
         check_instruction("MULU $5, $12", "15c5")
         check_instruction("MULU $1, $8", "1185")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MULU $9, $6", "1965")
         check_instruction("MULU $5, $1", "1515")
         check_instruction("MULU $5, $11", "15b5")
@@ -118,7 +118,7 @@ class TestMajor1:
         check_instruction("MULR $12, $1", "1c16")
         check_instruction("MULR $6, $1", "1616")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MULR $7, $1", "1716")
         check_instruction("MULR $10, $8", "1a86")
         check_instruction("MULR $4, $1", "1416")
@@ -135,7 +135,7 @@ class TestMajor1:
         check_instruction("MULRU $7, $1", "1717")
         check_instruction("MULRU $GP, $6", "1e67")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MULRU $3, $12", "13c7")
         check_instruction("MULRU $2, $TP", "12d7")
         check_instruction("MULRU $3, $TP", "13d7")
@@ -152,7 +152,7 @@ class TestMajor1:
         check_instruction("DIV $9, $12", "19c8")
         check_instruction("DIV $12, $11", "1cb8")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("DIV $6, $1", "1618")
         check_instruction("DIV $5, $11", "15b8")
         check_instruction("DIV $1, $9", "1198")
@@ -169,7 +169,7 @@ class TestMajor1:
         check_instruction("DIVU $0, $10", "10a9")
         check_instruction("DIVU $11, $10", "1ba9")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("DIVU $3, $9", "1399")
         check_instruction("DIVU $SP, $4", "1f49")
         check_instruction("DIVU $12, $5", "1c59")
@@ -202,7 +202,7 @@ class TestMajor1:
         check_instruction("EXTB $11", "1b0d")
         check_instruction("EXTB $12", "1c0d")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("EXTB $6", "160d")
         check_instruction("EXTB $10", "1a0d")
         check_instruction("EXTB $9", "190d")
@@ -229,7 +229,7 @@ class TestMajor1:
         check_instruction("EXTUB $0", "108d")
         check_instruction("EXTUB $4", "148d")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("EXTUB $7", "178d")
         check_instruction("EXTUB $1", "118d")
         check_instruction("EXTUB $6", "168d")
@@ -246,7 +246,7 @@ class TestMajor1:
         check_instruction("EXTUH $3", "13ad")
         check_instruction("EXTUH $0", "10ad")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("EXTUH $7", "17ad")
         check_instruction("EXTUH $5", "15ad")
         check_instruction("EXTUH $2", "12ad")
@@ -263,7 +263,7 @@ class TestMajor1:
         check_instruction("JMP $12", "10ce")
         check_instruction("JMP $1", "101e")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("JMP $7", "107e")
         check_instruction("JMP $8", "108e")
         check_instruction("JMP $10", "10ae")
@@ -280,7 +280,7 @@ class TestMajor1:
         check_instruction("JSR $12", "10cf")
         check_instruction("JSR $4", "104f")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("JSR $9", "109f")
         check_instruction("JSR $10", "10af")
         check_instruction("JSR $6", "106f")
diff --git a/test/arch/mep/asm/test_major_opcode_10.py b/test/arch/mep/asm/test_major_opcode_10.py
index 6c8d0cf4..f1089c61 100644
--- a/test/arch/mep/asm/test_major_opcode_10.py
+++ b/test/arch/mep/asm/test_major_opcode_10.py
@@ -16,7 +16,7 @@ class TestMajor10:
         check_instruction("BEQZ $11, 0x4", "ab04")
         check_instruction("BEQZ $12, 0xA", "ac0a")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BEQZ $0, 0x42", "a042")
         check_instruction("BEQZ $10, 0x6", "aa06")
         check_instruction("BEQZ $0, 0x8", "a008")
@@ -33,7 +33,7 @@ class TestMajor10:
         check_instruction("BNEZ $0, 0xFFFFFFF6", "a0f7")
         check_instruction("BNEZ $4, 0xA", "a40b")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BNEZ $7, 0xE", "a70f")
         check_instruction("BNEZ $11, 0xE", "ab0f")
         check_instruction("BNEZ $10, 0x28", "aa29")
diff --git a/test/arch/mep/asm/test_major_opcode_11.py b/test/arch/mep/asm/test_major_opcode_11.py
index 7876a968..b5d8a278 100644
--- a/test/arch/mep/asm/test_major_opcode_11.py
+++ b/test/arch/mep/asm/test_major_opcode_11.py
@@ -16,7 +16,7 @@ class TestMajor11:
         check_instruction("BRA 0x46", "b046")
         check_instruction("BRA 0xFFFFFF98", "bf98")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BRA 0x2AA", "b2aa")
         check_instruction("BRA 0x22", "b022")
         check_instruction("BRA 0x12", "b012")
@@ -33,7 +33,7 @@ class TestMajor11:
         check_instruction("BSR 0xFFFFFBB2", "bbb3", multi=2)
         check_instruction("BSR 0xFFFFFCCE", "bccf", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BSR 0xFFFFFED4", "bed5", multi=2)
         check_instruction("BSR 0xFFFFFF62", "bf63", multi=2)
         check_instruction("BSR 0xFFFFFF36", "bf37", multi=2)
diff --git a/test/arch/mep/asm/test_major_opcode_12.py b/test/arch/mep/asm/test_major_opcode_12.py
index c9a0be79..e721d287 100644
--- a/test/arch/mep/asm/test_major_opcode_12.py
+++ b/test/arch/mep/asm/test_major_opcode_12.py
@@ -16,7 +16,7 @@ class TestMajor12:
         check_instruction("ADD3 $12, $4, 0x48", "cc400048")
         check_instruction("ADD3 $SP, $SP, -68", "cff0ffbc")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("ADD3 $12, $SP, 0x6", "ccf00006")
         check_instruction("ADD3 $12, $12, 0x3E4", "ccc003e4")
         check_instruction("ADD3 $7, $5, -31912", "c7508358")
@@ -33,7 +33,7 @@ class TestMajor12:
         check_instruction("MOV $2, 139", "c201008b", multi=2)
         check_instruction("MOV $0, 194", "c00100c2", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MOV $12, 239", "cc0100ef", multi=2)
         check_instruction("MOV $1, 136", "c1010088", multi=2)
         check_instruction("MOV $3, 168", "c30100a8", multi=2)
@@ -50,7 +50,7 @@ class TestMajor12:
         check_instruction("MOVU $11, 0x8105", "cb118105")
         check_instruction("MOVU $11, 0x8106", "cb118106")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MOVU $9, 0x8126", "c9118126")
         check_instruction("MOVU $7, 0xFF00", "c711ff00")
         check_instruction("MOVU $2, 0xE200", "c211e200")
@@ -67,7 +67,7 @@ class TestMajor12:
         check_instruction("MOVH $1, 0x101", "c1210101")
         check_instruction("MOVH $12, 0x81", "cc210081")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MOVH $4, 0xF4D5", "c421f4d5")
         check_instruction("MOVH $10, 0xFC00", "ca21fc00")
         check_instruction("MOVH $12, 0xC003", "cc21c003")
@@ -84,7 +84,7 @@ class TestMajor12:
         check_instruction("SLT3 $0, $12, 0x801", "c0c20801")
         check_instruction("SLT3 $0, $4, 0x800", "c0420800")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLT3 $2, $4, 0x6A18", "c2426a18")
         check_instruction("SLT3 $2, $11, -31153", "c2b2864f")
         check_instruction("SLT3 $11, $12, 0x5BFA", "cbc25bfa")
@@ -101,7 +101,7 @@ class TestMajor12:
         check_instruction("SLTU3 $0, $12, 0x941", "c0c30941")
         check_instruction("SLTU3 $12, $8, 0x1001", "cc831001")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLTU3 $8, $12, 0x8BA9", "c8c38ba9")
         check_instruction("SLTU3 $12, $11, 0x1E", "ccb3001e")
         check_instruction("SLTU3 $6, $GP, 0x6C90", "c6e36c90")
@@ -118,7 +118,7 @@ class TestMajor12:
         check_instruction("OR3 $12, $12, 0x1", "ccc40001")
         check_instruction("OR3 $12, $12, 0x2", "ccc40002")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("OR3 $12, $GP, 0xC7", "cce400c7")
         check_instruction("OR3 $10, $3, 0x40", "ca340040")
         check_instruction("OR3 $3, $3, 0xFF97", "c334ff97")
@@ -135,7 +135,7 @@ class TestMajor12:
         check_instruction("AND3 $11, $12, 0x8", "cbc50008")
         check_instruction("AND3 $11, $12, 0x1", "cbc50001")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("AND3 $12, $7, 0x1FF", "cc7501ff")
         check_instruction("AND3 $9, $10, 0x4E27", "c9a54e27")
         check_instruction("AND3 $4, $4, 0xFB", "c44500fb")
@@ -152,7 +152,7 @@ class TestMajor12:
         check_instruction("XOR3 $12, $11, 0x4", "ccb60004")
         check_instruction("XOR3 $4, $4, 0x1", "c4460001")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("XOR3 $TP, $9, 0x8704", "cd968704")
         check_instruction("XOR3 $11, $SP, 0x7411", "cbf67411")
         check_instruction("XOR3 $SP, $8, 0x8801", "cf868801")
@@ -169,7 +169,7 @@ class TestMajor12:
         check_instruction("SB $11, 0x17($SP)", "cbf80017")
         check_instruction("SB $12, 0x16($SP)", "ccf80016")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SB $TP, -31053($6)", "cd6886b3")
         check_instruction("SB $3, 0x6E($8)", "c388006e")
         check_instruction("SB $7, 0x81($8)", "c7880081")
@@ -186,7 +186,7 @@ class TestMajor12:
         check_instruction("SH $4, 0xC($SP)", "c4f9000c")
         check_instruction("SH $11, 0x1E($4)", "cb49001e")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SH $SP, -30753($6)", "cf6987df")
         check_instruction("SH $12, 0x6C4($TP)", "ccd906c4")
         check_instruction("SH $4, 0x38($3)", "c4390038")
@@ -207,7 +207,7 @@ class TestMajor12:
         check_instruction("SW $10, 0xC($12)", "caca000c")
         check_instruction("SW $10, 0x4($12)", "caca0004")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SW $12, 0x100($1)", "cc1a0100")
         check_instruction("SW $10, 0x88($6)", "ca6a0088")
         check_instruction("SW $0, 0x188($SP)", "c0fa0188")
@@ -224,7 +224,7 @@ class TestMajor12:
         check_instruction("LBU $12, 0x16($SP)", "ccfb0016")
         check_instruction("LBU $11, 0x2($4)", "cb4b0002")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LBU $12, 0x16($4)", "cc4b0016")
         check_instruction("LBU $2, 0x3($11)", "c2bb0003")
         check_instruction("LBU $7, 0x5($2)", "c72b0005")
@@ -241,7 +241,7 @@ class TestMajor12:
         check_instruction("LB $9, 0x2($12)", "c9cc0002")
         check_instruction("LB $12, 0x16($SP)", "ccfc0016")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LB $0, 0x5784($10)", "c0ac5784")
         check_instruction("LB $11, -31243($9)", "cb9c85f5")
         check_instruction("LB $5, 0x11($6)", "c56c0011")
@@ -258,7 +258,7 @@ class TestMajor12:
         check_instruction("LH $4, 0x4($8)", "c48d0004")
         check_instruction("LH $9, 0x10($1)", "c91d0010")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LH $4, 0x8($8)", "c48d0008")
         check_instruction("LH $12, 0x8($10)", "ccad0008")
         check_instruction("LH $6, -32042($6)", "c66d82d6")
@@ -275,7 +275,7 @@ class TestMajor12:
         check_instruction("LW $2, 0x8($8)", "c28e0008")
         check_instruction("LW $4, 0x14($8)", "c48e0014")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LW $12, 0x1D48($7)", "cc7e1d48")
         check_instruction("LW $8, 0x58($1)", "c81e0058")
         check_instruction("LW $12, 0xB0($7)", "cc7e00b0")
@@ -292,7 +292,7 @@ class TestMajor12:
         check_instruction("LHU $4, 0x18($8)", "c48f0018")
         check_instruction("LHU $2, 0x10($8)", "c28f0010")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LHU $12, 0x94($8)", "cc8f0094")
         check_instruction("LHU $4, 0xE($6)", "c46f000e")
         check_instruction("LHU $11, 0x5B59($GP)", "cbef5b59")
diff --git a/test/arch/mep/asm/test_major_opcode_13.py b/test/arch/mep/asm/test_major_opcode_13.py
index b6e99dd5..996b47e3 100644
--- a/test/arch/mep/asm/test_major_opcode_13.py
+++ b/test/arch/mep/asm/test_major_opcode_13.py
@@ -16,7 +16,7 @@ class TestMajor13:
         check_instruction("MOVU $4, 0x202EE0", "d4e0202e", multi=2)
         check_instruction("MOVU $4, 0xC12A8E", "d48ec12a", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MOVU $4, 0x1D7100", "d4001d71", multi=2)
         check_instruction("MOVU $4, 0x8A395B", "d45b8a39", multi=2)
         check_instruction("MOVU $4, 0x67A3E6", "d4e667a3", multi=2)
@@ -32,7 +32,7 @@ class TestMajor13:
         check_instruction("BCPEQ 0xC, 0xAADA", "d8c4556d")
         check_instruction("BCPEQ 0x7, 0xFFFF18F6", "d8748c7b")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BCPEQ 0x6, 0xFFFF18CA", "d8648c65")
 
     def test_BCPNE(self):
@@ -44,7 +44,7 @@ class TestMajor13:
         check_instruction("BCPNE 0x7, 0xFFFF18FA", "d8758c7d")
         check_instruction("BCPNE 0x1, 0x674E", "d81533a7")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BCPNE 0xB, 0xD820", "d8b56c10")
         check_instruction("BCPNE 0x8, 0xFFFF1922", "d8858c91")
         check_instruction("BCPNE 0xD, 0xA6C8", "d8d55364")
@@ -61,7 +61,7 @@ class TestMajor13:
         check_instruction("BCPAT 0xC, 0x9D88", "d8c64ec4")
         check_instruction("BCPAT 0x7, 0xFFFF18FA", "d8768c7d")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BCPAT 0x6, 0xFFFF18D0", "d8668c68")
         check_instruction("BCPAT 0x7, 0xFFFF18FC", "d8768c7e")
         check_instruction("BCPAT 0x6, 0xFFFF18CE", "d8668c67")
@@ -78,7 +78,7 @@ class TestMajor13:
         check_instruction("BCPAF 0xF, 0x9E4E", "d8f74f27")
         check_instruction("BCPAF 0xD, 0xA412", "d8d75209")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BCPAF 0xB, 0xFFFF01CA", "d8b780e5")
         check_instruction("BCPAF 0xA, 0x9C2A", "d8a74e15")
         check_instruction("BCPAF 0x8, 0xFFFF1924", "d8878c92")
@@ -95,7 +95,7 @@ class TestMajor13:
         check_instruction("JMP 0x80FF2C", "d96880ff")
         check_instruction("JMP 0x814174", "dba88141")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("JMP 0xC3F782", "dc18c3f7")
         check_instruction("JMP 0xC814", "d8a800c8")
         check_instruction("JMP 0x9079EE", "df789079")
@@ -115,7 +115,7 @@ class TestMajor13:
         check_instruction("BSR 0x36C4", "de290036", multi=2)
         check_instruction("BSR 0xFFFC6AC4", "de29fc6a", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BSR 0x22C", "d9690002", multi=2)
         check_instruction("BSR 0x5FEE6A", "db595fee", multi=2)
         check_instruction("BSR 0x4AFF4", "dfa904af", multi=2)
@@ -135,7 +135,7 @@ class TestMajor13:
         check_instruction("BSRV 0x6509F4", "dfab6509")
         check_instruction("BSRV 0x8F50C8", "de4b8f50")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BSRV 0x544BF6", "dfbb544b")
         check_instruction("BSRV 0x8CCA2A", "d95b8cca")
         check_instruction("BSRV 0x4F681E", "d8fb4f68")
diff --git a/test/arch/mep/asm/test_major_opcode_14.py b/test/arch/mep/asm/test_major_opcode_14.py
index 1c2ac466..6ad3c757 100644
--- a/test/arch/mep/asm/test_major_opcode_14.py
+++ b/test/arch/mep/asm/test_major_opcode_14.py
@@ -16,7 +16,7 @@ class TestMajor14:
         check_instruction("BEQI $0, 0xA, 0x8", "e0a00004")
         check_instruction("BEQI $0, 0x0, 0xC4", "e0000062")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BEQI $0, 0x1, 0xFFFFFF6A", "e010ffb5")
         check_instruction("BEQI $1, 0x2, 0x20", "e1200010")
         check_instruction("BEQI $9, 0x0, 0xE0", "e9000070")
@@ -33,7 +33,7 @@ class TestMajor14:
         check_instruction("BEQ $0, $0, 0x102", "e0010081")
         check_instruction("BEQ $7, $11, 0x56", "e7b1002b")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BEQ $11, $9, 0x26", "eb910013")
         check_instruction("BEQ $12, $11, 0x28", "ecb10014")
         check_instruction("BEQ $0, $0, 0xA12", "e0010509")
@@ -53,7 +53,7 @@ class TestMajor14:
         check_instruction("BNEI $4, 0x2, 0xDA", "e424006d")
         check_instruction("BNEI $12, 0x1, 0x8", "ec140004")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BNEI $12, 0x2, 0x6", "ec240003")
         check_instruction("BNEI $3, 0xC, 0xFFFF2D68", "e3c496b4")
         check_instruction("BNEI $4, 0x1, 0x10", "e4140008")
@@ -70,7 +70,7 @@ class TestMajor14:
         check_instruction("BNE $3, $0, 0xFFFF35A8", "e3059ad4")
         check_instruction("BNE $10, $3, 0xA", "ea350005")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BNE $4, $12, 0x8", "e4c50004")
         check_instruction("BNE $4, $1, 0x10", "e4150008")
         check_instruction("BNE $4, $12, 0x34", "e4c5001a")
@@ -87,7 +87,7 @@ class TestMajor14:
         check_instruction("BGEI $12, 0x0, 0x22", "ec080011")
         check_instruction("BGEI $GP, 0xE, 0xFFFF2996", "eee894cb")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BGEI $4, 0x5, 0x52", "e4580029")
         check_instruction("BGEI $1, 0x4, 0xA", "e1480005")
         check_instruction("BGEI $8, 0x0, 0x10", "e8080008")
@@ -103,7 +103,7 @@ class TestMajor14:
         check_instruction("REPEAT $11, 0x8", "eb090004")
         check_instruction("REPEAT $11, 0x6", "eb090003")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("REPEAT $12, 0x24", "ec090012")
         check_instruction("REPEAT $9, 0x8", "e9090004")
         check_instruction("REPEAT $12, 0x14", "ec09000a")
@@ -120,7 +120,7 @@ class TestMajor14:
         check_instruction("EREPEAT 0x12", "e0190009")
         check_instruction("EREPEAT 0x1C", "e019000e")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("EREPEAT 0x12", "e0190009")
         check_instruction("EREPEAT 0x7E", "e019003f")
         check_instruction("EREPEAT 0x8", "e0190004")
@@ -137,7 +137,7 @@ class TestMajor14:
         check_instruction("BLTI $7, 0x1, 0x1A", "e71c000d")
         check_instruction("BLTI $12, 0x9, 0xEA52", "ec9c7529")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BLTI $4, 0x6, 0xFFFF25AE", "e46c92d7")
         check_instruction("BLTI $12, 0x1, 0x24", "ec1c0012")
         check_instruction("BLTI $9, 0xF, 0xFFFF1F0A", "e9fc8f85")
@@ -154,7 +154,7 @@ class TestMajor14:
         check_instruction("SW $4, (0x826864)", "e4668268")
         check_instruction("SW $4, (0x826994)", "e4968269")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SW $1, (0x815864)", "e1668158")
         check_instruction("SW $1, (0x825BD8)", "e1da825b")
         check_instruction("SW $10, (0x6225AC)", "eaae6225")
@@ -171,7 +171,7 @@ class TestMajor14:
         check_instruction("LW $3, (0x816820)", "e3238168")
         check_instruction("LW $4, (0x81F0F0)", "e4f381f0")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LW $GP, (0x94CEE8)", "eeeb94ce")
         check_instruction("LW $4, (0x823608)", "e40b8236")
         check_instruction("LW $0, (0x815E40)", "e043815e")
diff --git a/test/arch/mep/asm/test_major_opcode_15.py b/test/arch/mep/asm/test_major_opcode_15.py
index 8eeb2eff..ecad8b3f 100644
--- a/test/arch/mep/asm/test_major_opcode_15.py
+++ b/test/arch/mep/asm/test_major_opcode_15.py
@@ -152,7 +152,7 @@ class TestMajor15:
         check_instruction("MADD $10, $4", "fa413004")
         check_instruction("MADD $4, $11", "f4b13004")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MADD $7, $10", "f7a13004")
         check_instruction("MADD $0, $10", "f0a13004")
         check_instruction("MADD $12, $9", "fc913004")
@@ -169,7 +169,7 @@ class TestMajor15:
         check_instruction("MADDU $6, $9", "f6913005")
         check_instruction("MADDU $6, $10", "f6a13005")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MADDU $10, $12", "fac13005")
         check_instruction("MADDU $10, $2", "fa213005")
         check_instruction("MADDU $1, $12", "f1c13005")
@@ -195,7 +195,7 @@ class TestMajor15:
         check_instruction("MADDRU $11, $1", "fb113007")
         check_instruction("MADDRU $12, $1", "fc113007")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MADDRU $1, $0", "f1013007")
         check_instruction("MADDRU $10, $3", "fa313007")
         check_instruction("MADDRU $12, $11", "fcb13007")
@@ -221,7 +221,7 @@ class TestMajor15:
         check_instruction("STCB $11, 0x0", "fb040000")
         check_instruction("STCB $12, 0x4100", "fc044100")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("STCB $2, 0x4007", "f2044007")
         check_instruction("STCB $10, 0x4002", "fa044002")
         check_instruction("STCB $11, 0x2", "fb040002")
@@ -238,7 +238,7 @@ class TestMajor15:
         check_instruction("LDCB $12, 0x1000", "fc141000")
         check_instruction("LDCB $12, 0x0", "fc140000")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LDCB $12, 0x420", "fc140420")
         check_instruction("LDCB $10, 0x1", "fa140001")
         check_instruction("LDCB $11, 0x5", "fb140005")
@@ -255,7 +255,7 @@ class TestMajor15:
         check_instruction("SBCPA $C4, ($TP+), -52", "f4d500cc")
         check_instruction("SBCPA $C6, ($4+), -55", "f64500c9")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SBCPA $C2, ($SP+), -51", "f2f500cd")
         check_instruction("SBCPA $C13, ($8+), -52", "fd8500cc")
         check_instruction("SBCPA $C2, ($TP+), -51", "f2d500cd")
@@ -524,7 +524,7 @@ class TestMajor15:
         check_instruction("SWCP $C2, 24658($5)", "f25c6052")
         check_instruction("SWCP $C0, 27132($9)", "f09c69fc")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SWCP $C9, 195($10)", "f9ac00c3")
         check_instruction("SWCP $C5, -25704($5)", "f55c9b98")
         check_instruction("SWCP $C2, -31068($11)", "f2bc86a4")
@@ -541,7 +541,7 @@ class TestMajor15:
         check_instruction("LWCP $C15, -26720($8)", "ff8d97a0")
         check_instruction("LWCP $C15, 26934($4)", "ff4d6936")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LWCP $C11, -25049($5)", "fb5d9e27")
         check_instruction("LWCP $C6, -25560($8)", "f68d9c28")
         check_instruction("LWCP $C7, -24867($GP)", "f7ed9edd")
@@ -558,7 +558,7 @@ class TestMajor15:
         check_instruction("SMCP $C3, 6490($4)", "f34e195a")
         check_instruction("SMCP $C2, -11232($10)", "f2aed420")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SMCP $C6, 201($7)", "f67e00c9")
         check_instruction("SMCP $C3, -25912($6)", "f36e9ac8")
         check_instruction("SMCP $C9, -25215($7)", "f97e9d81")
@@ -575,7 +575,7 @@ class TestMajor15:
         check_instruction("LMCP $C15, 4095($SP)", "ffff0fff")
         check_instruction("LMCP $C15, -1($SP)", "ffffffff")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LMCP $C7, -24863($GP)", "f7ef9ee1")
         check_instruction("LMCP $C14, 16674($SP)", "feff4122")
         check_instruction("LMCP $C13, 1023($SP)", "fdff03ff")
diff --git a/test/arch/mep/asm/test_major_opcode_2.py b/test/arch/mep/asm/test_major_opcode_2.py
index 913d8756..07743813 100644
--- a/test/arch/mep/asm/test_major_opcode_2.py
+++ b/test/arch/mep/asm/test_major_opcode_2.py
@@ -16,7 +16,7 @@ class TestMajor2:
         check_instruction("BSETM ($2), 0x5", "2520")
         check_instruction("BSETM ($2), 0x0", "2020")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BSETM ($8), 0x4", "2480")
         check_instruction("BSETM ($5), 0x5", "2550")
         check_instruction("BSETM ($5), 0x0", "2050")
@@ -33,7 +33,7 @@ class TestMajor2:
         check_instruction("BCLRM ($2), 0x1", "2121")
         check_instruction("BCLRM ($0), 0x0", "2001")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BCLRM ($6), 0x4", "2461")
         check_instruction("BCLRM ($7), 0x4", "2471")
         check_instruction("BCLRM ($6), 0x5", "2561")
@@ -50,7 +50,7 @@ class TestMajor2:
         check_instruction("BNOTM ($3), 0x0", "2032")
         check_instruction("BNOTM ($7), 0x0", "2072")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BNOTM ($6), 0x4", "2462")
         check_instruction("BNOTM ($2), 0x2", "2222")
         check_instruction("BNOTM ($0), 0x1", "2102")
@@ -67,7 +67,7 @@ class TestMajor2:
         check_instruction("BTSTM $0, ($0), 0x0", "2003")
         check_instruction("BTSTM $0, ($7), 0x0", "2073")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("BTSTM $0, ($2), 0x4", "2423")
         check_instruction("BTSTM $0, ($12), 0x6", "26c3")
         check_instruction("BTSTM $0, ($4), 0x5", "2543")
@@ -84,7 +84,7 @@ class TestMajor2:
         check_instruction("TAS $0, ($7)", "2074")
         check_instruction("TAS $0, ($6)", "2064")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("TAS $1, ($6)", "2164")
         check_instruction("TAS $11, ($3)", "2b34")
         check_instruction("TAS $1, ($0)", "2104")
@@ -101,7 +101,7 @@ class TestMajor2:
         check_instruction("SL1AD3 $0, $3, $3", "2336")
         check_instruction("SL1AD3 $0, $12, $12", "2cc6")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SL1AD3 $0, $5, $4", "2546")
         check_instruction("SL1AD3 $0, $11, $4", "2b46")
         check_instruction("SL1AD3 $0, $GP, $3", "2e36")
@@ -118,7 +118,7 @@ class TestMajor2:
         check_instruction("SL2AD3 $0, $12, $0", "2c07")
         check_instruction("SL2AD3 $0, $11, $4", "2b47")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SL2AD3 $0, $10, $SP", "2af7")
         check_instruction("SL2AD3 $0, $4, $8", "2487")
         check_instruction("SL2AD3 $0, $10, $12", "2ac7")
@@ -135,7 +135,7 @@ class TestMajor2:
         check_instruction("SRL $0, $6", "206c")
         check_instruction("SRL $SP, $3", "2f3c")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SRL $9, $6", "296c")
         check_instruction("SRL $2, $7", "227c")
         check_instruction("SRL $9, $12", "29cc")
@@ -152,7 +152,7 @@ class TestMajor2:
         check_instruction("SRA $0, $3", "203d")
         check_instruction("SRA $0, $5", "205d")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SRA $11, $2", "2b2d")
         check_instruction("SRA $9, $6", "296d")
         check_instruction("SRA $4, $8", "248d")
@@ -169,7 +169,7 @@ class TestMajor2:
         check_instruction("SLL $5, $2", "252e")
         check_instruction("SLL $0, $6", "206e")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLL $4, $0", "240e")
         check_instruction("SLL $SP, $10", "2fae")
         check_instruction("SLL $0, $4", "204e")
@@ -186,7 +186,7 @@ class TestMajor2:
         check_instruction("FSFT $SP, $2", "2f2f")
         check_instruction("FSFT $0, $6", "206f")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("FSFT $SP, $6", "2f6f")
         check_instruction("FSFT $0, $9", "209f")
         check_instruction("FSFT $5, $9", "259f")
diff --git a/test/arch/mep/asm/test_major_opcode_3.py b/test/arch/mep/asm/test_major_opcode_3.py
index 6802e752..3e0c5864 100644
--- a/test/arch/mep/asm/test_major_opcode_3.py
+++ b/test/arch/mep/asm/test_major_opcode_3.py
@@ -16,7 +16,7 @@ class TestMajor3:
         check_instruction("SWCPI $C2, ($3+)", "3230")
         check_instruction("SWCPI $C0, ($3+)", "3030")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SWCPI $C2, ($2+)", "3220")
         check_instruction("SWCPI $C6, ($10+)", "36a0")
         check_instruction("SWCPI $C15, ($SP+)", "3ff0")
@@ -33,7 +33,7 @@ class TestMajor3:
         check_instruction("LWCPI $C1, ($3+)", "3131")
         check_instruction("LWCPI $C10, ($4+)", "3a41")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LWCPI $C0, ($1+)", "3011")
         check_instruction("LWCPI $C0, ($11+)", "30b1")
         check_instruction("LWCPI $C3, ($10+)", "33a1")
@@ -50,7 +50,7 @@ class TestMajor3:
         check_instruction("SMCPI $C8, ($10+)", "38a2")
         check_instruction("SMCPI $C0, ($3+)", "3032")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SMCPI $C5, ($10+)", "35a2")
         check_instruction("SMCPI $C9, ($3+)", "3932")
         check_instruction("SMCPI $C11, ($5+)", "3b52")
@@ -67,7 +67,7 @@ class TestMajor3:
         check_instruction("LMCPI $C3, ($3+)", "3333")
         check_instruction("LMCPI $C0, ($0+)", "3003")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LMCPI $C0, ($SP+)", "30f3")
         check_instruction("LMCPI $C1, ($1+)", "3113")
         check_instruction("LMCPI $C3, ($0+)", "3303")
@@ -84,7 +84,7 @@ class TestMajor3:
         check_instruction("SWCP $C10, ($7)", "3a78")
         check_instruction("SWCP $C0, ($10)", "30a8")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SWCP $C7, ($12)", "37c8")
         check_instruction("SWCP $C1, ($1)", "3118")
         check_instruction("SWCP $C10, ($5)", "3a58")
@@ -101,7 +101,7 @@ class TestMajor3:
         check_instruction("LWCP $C6, ($10)", "36a9")
         check_instruction("LWCP $C6, ($TP)", "36d9")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LWCP $C11, ($9)", "3b99")
         check_instruction("LWCP $C1, ($1)", "3119")
         check_instruction("LWCP $C7, ($3)", "3739")
@@ -118,7 +118,7 @@ class TestMajor3:
         check_instruction("SMCP $C0, ($GP)", "30ea")
         check_instruction("SMCP $C12, ($0)", "3c0a")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SMCP $C3, ($4)", "334a")
         check_instruction("SMCP $C13, ($0)", "3d0a")
         check_instruction("SMCP $C3, ($3)", "333a")
@@ -135,7 +135,7 @@ class TestMajor3:
         check_instruction("LMCP $C9, ($4)", "394b")
         check_instruction("LMCP $C15, ($6)", "3f6b")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LMCP $C0, ($4)", "304b")
         check_instruction("LMCP $C0, ($GP)", "30eb")
         check_instruction("LMCP $C13, ($6)", "3d6b")
diff --git a/test/arch/mep/asm/test_major_opcode_4.py b/test/arch/mep/asm/test_major_opcode_4.py
index c5de257e..e52acf3f 100644
--- a/test/arch/mep/asm/test_major_opcode_4.py
+++ b/test/arch/mep/asm/test_major_opcode_4.py
@@ -21,7 +21,7 @@ class TestMajor4:
         check_instruction("ADD3 $SP, $SP, 0x20", "4f20", multi=2)
         check_instruction("ADD3 $1, $SP, 0x4", "4104", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("ADD3 $11, $SP, 0x38", "4b38", multi=2)
         check_instruction("ADD3 $5, $SP, 0x30", "4530", multi=2)
         check_instruction("ADD3 $TP, $SP, 0x38", "4d38", multi=2)
@@ -48,7 +48,7 @@ class TestMajor4:
         check_instruction("SW $8, 0x4($SP)", "4806", multi=2)
         check_instruction("SW $4, 0x40($SP)", "4442", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SW $4, 0x30($SP)", "4432", multi=2)
         check_instruction("SW $9, 0x3C($SP)", "493e", multi=2)
         check_instruction("SW $6, 0x68($SP)", "466a", multi=2)
@@ -75,7 +75,7 @@ class TestMajor4:
         check_instruction("LW $TP, 0x4($SP)", "4d07", multi=2)
         check_instruction("LW $8, 0x4($SP)", "4807", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LW $9, 0x4C($SP)", "494f", multi=2)
         check_instruction("LW $2, 0x44($TP)", "42c7", multi=2)
         check_instruction("LW $6, 0x58($SP)", "465b", multi=2)
@@ -102,7 +102,7 @@ class TestMajor4:
         check_instruction("LBU $4, 0x5($TP)", "4c85", multi=2)
         check_instruction("LBU $4, 0x6($TP)", "4c86", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LBU $4, 0x21($TP)", "4ca1", multi=2)
         check_instruction("LBU $4, 0x22($TP)", "4ca2", multi=2)
         # Note: the following instruction can not be easily manipulated due to
diff --git a/test/arch/mep/asm/test_major_opcode_5.py b/test/arch/mep/asm/test_major_opcode_5.py
index dc984420..e39230f4 100644
--- a/test/arch/mep/asm/test_major_opcode_5.py
+++ b/test/arch/mep/asm/test_major_opcode_5.py
@@ -16,7 +16,7 @@ class TestMajor5:
         check_instruction("MOV $0, 0", "5000", multi=2)
         check_instruction("MOV $0, 3", "5003", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("MOV $8, 84", "5854", multi=2)
         check_instruction("MOV $SP, 108", "5f6c", multi=2)
         check_instruction("MOV $12, 80", "5c50", multi=2)
diff --git a/test/arch/mep/asm/test_major_opcode_6.py b/test/arch/mep/asm/test_major_opcode_6.py
index be7858b5..5eda1ea6 100644
--- a/test/arch/mep/asm/test_major_opcode_6.py
+++ b/test/arch/mep/asm/test_major_opcode_6.py
@@ -16,7 +16,7 @@ class TestMajor6:
         check_instruction("ADD $SP, -8", "6fe0")
         check_instruction("ADD $4, 1", "6404")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("ADD $2, -26", "6298")
         check_instruction("ADD $TP, 7", "6d1c")
         check_instruction("ADD $SP, 26", "6f68")
@@ -33,7 +33,7 @@ class TestMajor6:
         check_instruction("SLT3 $0, $GP, 0xC", "6e61", multi=2)
         check_instruction("SLT3 $0, $GP, 0xD", "6e69", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLT3 $0, $8, 0x14", "68a1", multi=2)
         check_instruction("SLT3 $0, $6, 0x0", "6601", multi=2)
         check_instruction("SLT3 $0, $2, 0xB", "6259", multi=2)
@@ -50,7 +50,7 @@ class TestMajor6:
         check_instruction("SRL $12, 0x2", "6c12")
         check_instruction("SRL $5, 0xE", "6572")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SRL $3, 0x16", "63b2")
         check_instruction("SRL $0, 0x1F", "60fa")
         check_instruction("SRL $5, 0xF", "657a")
@@ -67,7 +67,7 @@ class TestMajor6:
         check_instruction("SRA $4, 0x1", "640b")
         check_instruction("SRA $12, 0x8", "6c43")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SRA $0, 0x1B", "60db")
         check_instruction("SRA $10, 0x17", "6abb")
         check_instruction("SRA $GP, 0xB", "6e5b")
@@ -84,7 +84,7 @@ class TestMajor6:
         check_instruction("SLTU3 $0, $GP, 0xC", "6e65", multi=2)
         check_instruction("SLTU3 $0, $4, 0x4", "6425", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLTU3 $0, $9, 0x9", "694d", multi=2)
         check_instruction("SLTU3 $0, $TP, 0xF", "6d7d", multi=2)
         check_instruction("SLTU3 $0, $10, 0x1D", "6aed", multi=2)
@@ -101,7 +101,7 @@ class TestMajor6:
         check_instruction("SLL $0, 0x2", "6016")
         check_instruction("SLL $0, 0x3", "601e")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLL $8, 0x16", "68b6")
         check_instruction("SLL $SP, 0x4", "6f26")
         check_instruction("SLL $4, 0x19", "64ce")
@@ -118,7 +118,7 @@ class TestMajor6:
         check_instruction("SLL3 $0, $GP, 0xD", "6e6f")
         check_instruction("SLL3 $0, $1, 0x3", "611f")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SLL3 $0, $11, 0x16", "6bb7")
         check_instruction("SLL3 $0, $TP, 0xD", "6d6f")
         check_instruction("SLL3 $0, $10, 0xB", "6a5f")
diff --git a/test/arch/mep/asm/test_major_opcode_7.py b/test/arch/mep/asm/test_major_opcode_7.py
index fcd5e1f9..15a045da 100644
--- a/test/arch/mep/asm/test_major_opcode_7.py
+++ b/test/arch/mep/asm/test_major_opcode_7.py
@@ -82,7 +82,7 @@ class TestMajor7:
         check_instruction("CACHE 0x9, ($7)", "7974")
         check_instruction("CACHE 0x2, ($6)", "7264")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("CACHE 0x5, ($8)", "7584")
         check_instruction("CACHE 0xC, ($6)", "7c64")
         check_instruction("CACHE 0x2, ($1)", "7214")
@@ -108,7 +108,7 @@ class TestMajor7:
         check_instruction("STC $8, $LO", "7888")
         check_instruction("STC $0, $LP", "7018")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("STC $9, $DBG", "7989")
         check_instruction("STC $2, $DBG", "7289")
         check_instruction("STC $9, $LO", "7988")
@@ -125,7 +125,7 @@ class TestMajor7:
         check_instruction("LDC $12, $LO", "7c8a")
         check_instruction("LDC $0, $LP", "701a")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LDC $11, $RPC", "7b6a")
         check_instruction("LDC $10, $CFG", "7a5b")
         check_instruction("LDC $2, $NPC", "727b")
diff --git a/test/arch/mep/asm/test_major_opcode_8.py b/test/arch/mep/asm/test_major_opcode_8.py
index c4a8505f..7f15f9e8 100644
--- a/test/arch/mep/asm/test_major_opcode_8.py
+++ b/test/arch/mep/asm/test_major_opcode_8.py
@@ -16,7 +16,7 @@ class TestMajor8:
         check_instruction("SB $4, 0x1($TP)", "8401", multi=2)
         check_instruction("SB $0, 0x3($TP)", "8003", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SB $2, 0x65($TP)", "8265", multi=2)
         check_instruction("SB $5, 0x48($TP)", "8548", multi=2)
         check_instruction("SB $7, 0x77($TP)", "8777", multi=2)
@@ -33,7 +33,7 @@ class TestMajor8:
         check_instruction("SH $4, 0x4($TP)", "8484", multi=2)
         check_instruction("SH $4, 0xC($TP)", "848c", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("SH $7, 0x3A($TP)", "87ba", multi=2)
         check_instruction("SH $2, 0x36($TP)", "82b6", multi=2)
         check_instruction("SH $1, 0x76($TP)", "81f6", multi=2)
@@ -50,7 +50,7 @@ class TestMajor8:
         check_instruction("LB $4, 0x1A($TP)", "8c1a", multi=2)
         check_instruction("LB $4, 0x6($TP)", "8c06", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LB $4, 0x59($TP)", "8c59", multi=2)
         check_instruction("LB $7, 0x53($TP)", "8f53", multi=2)
         check_instruction("LB $6, 0x62($TP)", "8e62", multi=2)
@@ -67,7 +67,7 @@ class TestMajor8:
         check_instruction("LH $4, 0x6($TP)", "8c86", multi=2)
         check_instruction("LH $4, 0x4($TP)", "8c84", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LH $7, 0x28($TP)", "8fa8", multi=2)
         check_instruction("LH $4, 0x16($TP)", "8c96", multi=2)
         check_instruction("LH $0, 0x56($TP)", "88d6", multi=2)
@@ -84,7 +84,7 @@ class TestMajor8:
         check_instruction("LHU $4, 0x10($TP)", "8c91", multi=2)
         check_instruction("LHU $3, 0xC($TP)", "8b8d", multi=2)
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("LHU $3, 0x54($TP)", "8bd5", multi=2)
         check_instruction("LHU $7, 0x66($TP)", "8fe7", multi=2)
         check_instruction("LHU $2, 0x6E($TP)", "8aef", multi=2)
diff --git a/test/arch/mep/asm/test_major_opcode_9.py b/test/arch/mep/asm/test_major_opcode_9.py
index 822f3b6a..b8949887 100644
--- a/test/arch/mep/asm/test_major_opcode_9.py
+++ b/test/arch/mep/asm/test_major_opcode_9.py
@@ -16,7 +16,7 @@ class TestMajor9:
         check_instruction("ADD3 $7, $12, $0", "9c07")
         check_instruction("ADD3 $TP, $4, $0", "940d")
 
-        # Randomly choosen instructions
+        # Randomly chosen instructions
         check_instruction("ADD3 $4, $1, $9", "9194")
         check_instruction("ADD3 $7, $12, $9", "9c97")
         check_instruction("ADD3 $12, $9, $SP", "99fc")
diff --git a/test/core/test_types.py b/test/core/test_types.py
index 0b5f6baa..92867748 100755
--- a/test/core/test_types.py
+++ b/test/core/test_types.py
@@ -79,7 +79,7 @@ set_allocator(my_heap.vm_alloc)
 
 # Ptr tests
 ## Setup for Ptr tests
-# the addr field can now be omited since allocator is set
+# the addr field can now be omitted since allocator is set
 other = OtherStruct(jitter.vm)
 other.foo = 0x1234
 assert other.foo == 0x1234
diff --git a/test/expression/simplifications.py b/test/expression/simplifications.py
index 57895510..364456c6 100644
--- a/test/expression/simplifications.py
+++ b/test/expression/simplifications.py
@@ -20,7 +20,7 @@ args = parser.parse_args()
 if args.verbose:
     log_exprsimp.setLevel(logging.DEBUG)
 
-# Additionnal imports and definitions
+# Additional imports and definitions
 if args.z3:
     import z3
     from miasm2.ir.translators import Translator
diff --git a/test/jitter/test_post_instr.py b/test/jitter/test_post_instr.py
index 97ba167f..0aff667e 100644
--- a/test/jitter/test_post_instr.py
+++ b/test/jitter/test_post_instr.py
@@ -34,7 +34,7 @@ jitter.add_exception_handler(EXCEPT_BREAKPOINT_MEMORY,
                              do_not_raise_me)
 jitter.vm.add_memory_breakpoint(0x11000-4, 4, PAGE_READ | PAGE_WRITE)
 
-# The memory write pending will raise automod execption
+# The memory write pending will raise automod exception
 # The RET should not re evaluate PC @ [ESP+4]
 jitter.init_run(0x1000)
 try:
diff --git a/test/os_dep/linux/test_env.py b/test/os_dep/linux/test_env.py
index a44d62c4..0c80571f 100644
--- a/test/os_dep/linux/test_env.py
+++ b/test/os_dep/linux/test_env.py
@@ -20,7 +20,7 @@ elif arch == "arml":
 elif arch == "aarch64l":
     sandbox = Sandbox_Linux_aarch64l
 else:
-    raise ValueError("Unsuported arch: %s" % arch)
+    raise ValueError("Unsupported arch: %s" % arch)
 
 # Parse arguments
 parser = sandbox.parser(description="ELF sandboxer")
diff --git a/test/test_all.py b/test/test_all.py
index 4cb18241..4b97ffba 100755
--- a/test/test_all.py
+++ b/test/test_all.py
@@ -21,7 +21,7 @@ TAGS = {"regression": "REGRESSION", # Regression tests
         "long": "LONG", # Very time consumming tests
         "llvm": "LLVM", # LLVM dependency is required
         "gcc": "GCC", # GCC based tests
-        "z3": "Z3", # Z3 dependecy is needed
+        "z3": "Z3", # Z3 dependency is needed
         "qemu": "QEMU", # QEMU tests (several tests)
         "cparser": "CPARSER", # pycparser is needed
         "linux": "LINUX", # Test must be run on a Linux
@@ -847,7 +847,7 @@ By default, all tag are considered." % ", ".join(TAGS.keys()), default="")
                 continue
             if tag not in TAGS:
                 print "%(red)s[TAG]%(end)s" % cosmetics.colors, \
-                    "Unkown tag '%s'" % tag
+                    "Unknown tag '%s'" % tag
                 exit(-1)
             dest.append(TAGS[tag])
 
@@ -884,7 +884,7 @@ By default, all tag are considered." % ", ".join(TAGS.keys()), default="")
         config.write(open(coveragerc, 'w'))
 
         # Add arguments to tests command line
-        testset.add_additionnal_args(["-m", "coverage", "run", "--rcfile",
+        testset.add_additional_args(["-m", "coverage", "run", "--rcfile",
                                       coveragerc, "-a"])
 
 
diff --git a/test/utils/testset.py b/test/utils/testset.py
index 5688b7e5..7b60e836 100644
--- a/test/utils/testset.py
+++ b/test/utils/testset.py
@@ -36,10 +36,10 @@ class MessageClose(Message):
     pass
 
 def worker(todo_queue, message_queue, init_args):
-    """Worker launched in parrallel
+    """Worker launched in parallel
     @todo_queue: task to do
     @message_queue: communication with Host
-    @init_args: additionnal arguments for command line
+    @init_args: additional arguments for command line
     """
 
     # Main loop
@@ -75,7 +75,7 @@ class TestSet(object):
     worker = staticmethod(worker)
 
     def __init__(self, base_dir):
-        """Initalise a test set
+        """Initialise a test set
         @base_dir: base directory for tests
         """
         # Parse arguments
@@ -203,7 +203,7 @@ class TestSet(object):
             except OSError:
                 print "Cleanning error: Unable to remove %s" % product
 
-    def add_additionnal_args(self, args):
+    def add_additional_args(self, args):
         """Add arguments to used on the test command line
         @args: list of str
         """