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authorWilliam Bruneau <william.bruneau@epfedu.fr>2019-09-20 12:52:12 +0200
committerWilliam Bruneau <william.bruneau@epfedu.fr>2019-09-20 13:17:59 +0200
commit9d5e0d20f6374f73d56e97decdac570108a1ff98 (patch)
treed461bdbb4969302088071816da65f963246ec655
parent326673c7dad5d915f88a8fcbcbfbab6287839933 (diff)
downloadmiasm-9d5e0d20f6374f73d56e97decdac570108a1ff98.tar.gz
miasm-9d5e0d20f6374f73d56e97decdac570108a1ff98.zip
Codespell: fix some spelling mistakes
-rw-r--r--miasm/analysis/data_analysis.py14
-rw-r--r--miasm/arch/mep/arch.py4
-rw-r--r--miasm/arch/mep/jit.py6
-rw-r--r--miasm/arch/mep/sem.py2
-rw-r--r--miasm/core/asmblock.py20
-rw-r--r--miasm/core/parse_asm.py2
-rw-r--r--miasm/ir/ir.py4
-rw-r--r--miasm/ir/symbexec.py4
-rw-r--r--miasm/jitter/jitcore_gcc.py2
-rw-r--r--miasm/jitter/jitload.py2
-rw-r--r--miasm/jitter/llvmconvert.py4
-rw-r--r--test/analysis/data_flow.py2
-rw-r--r--test/analysis/depgraph.py2
13 files changed, 34 insertions, 34 deletions
diff --git a/miasm/analysis/data_analysis.py b/miasm/analysis/data_analysis.py
index 54876487..ae06c59b 100644
--- a/miasm/analysis/data_analysis.py
+++ b/miasm/analysis/data_analysis.py
@@ -70,9 +70,9 @@ def inter_block_flow_link(ir_arch, ircfg, flow_graph, irb_in_nodes, irb_out_node
     lbl, current_nodes, exec_nodes = todo
     current_nodes = dict(current_nodes)
 
-    # link current nodes to bloc in_nodes
+    # link current nodes to block in_nodes
     if not lbl in ircfg.blocks:
-        print("cannot find bloc!!", lbl)
+        print("cannot find block!!", lbl)
         return set()
     irb = ircfg.blocks[lbl]
     to_del = set()
@@ -92,7 +92,7 @@ def inter_block_flow_link(ir_arch, ircfg, flow_graph, irb_in_nodes, irb_out_node
                     continue
                 flow_graph.add_uniq_edge(current_nodes[n_x_r], node_n_r)
 
-    # update current nodes using bloc out_nodes
+    # update current nodes using block out_nodes
     for n_w, node_n_w in viewitems(irb_out_nodes[irb.loc_key]):
         current_nodes[n_w] = node_n_w
 
@@ -116,7 +116,7 @@ def create_implicit_flow(ir_arch, flow_graph, irb_in_nodes, irb_out_ndes):
         irb = ir_arch.blocks[lbl]
         for lbl_son in ir_arch.graph.successors(irb.loc_key):
             if not lbl_son in ir_arch.blocks:
-                print("cannot find bloc!!", lbl)
+                print("cannot find block!!", lbl)
                 continue
             irb_son = ir_arch.blocks[lbl_son]
             for n_r in irb_in_nodes[irb_son.loc_key]:
@@ -155,7 +155,7 @@ class symb_exec_func(object):
 
     """
     This algorithm will do symbolic execution on a function, trying to propagate
-    states between basic blocks in order to extract inter-blocs dataflow. The
+    states between basic blocks in order to extract inter-blocks dataflow. The
     algorithm tries to merge states from blocks with multiple parents.
 
     There is no real magic here, loops and complex merging will certainly fail.
@@ -173,10 +173,10 @@ class symb_exec_func(object):
     def add_state(self, parent, ad, state):
         variables = dict(state.symbols)
 
-        # get bloc dead, and remove from state
+        # get block dead, and remove from state
         b = self.ir_arch.get_block(ad)
         if b is None:
-            raise ValueError("unknown bloc! %s" % ad)
+            raise ValueError("unknown block! %s" % ad)
         s = parent, ad, tuple(sorted(viewitems(variables)))
         self.todo.add(s)
 
diff --git a/miasm/arch/mep/arch.py b/miasm/arch/mep/arch.py
index 8a9f60fd..d06a93ca 100644
--- a/miasm/arch/mep/arch.py
+++ b/miasm/arch/mep/arch.py
@@ -175,7 +175,7 @@ class instruction_mep(instruction):
         return o
 
     def breakflow(self):
-        """Instructions that stop a basic bloc."""
+        """Instructions that stop a basic block."""
 
         if self.name in ["BRA", "BEQZ", "BNEZ", "BEQI", "BNEI", "BLTI", "BGEI", "BEQ", "BNE", "BSR"]:
             return True
@@ -189,7 +189,7 @@ class instruction_mep(instruction):
         return False
 
     def splitflow(self):
-        """Instructions that splits a basic bloc, i.e. the CPU can go somewhere else."""
+        """Instructions that splits a basic block, i.e. the CPU can go somewhere else."""
 
         if self.name in ["BEQZ", "BNEZ", "BEQI", "BNEI", "BLTI", "BGEI", "BEQ", "BNE", "BSR"]:
             return True
diff --git a/miasm/arch/mep/jit.py b/miasm/arch/mep/jit.py
index 98cc1805..4470b344 100644
--- a/miasm/arch/mep/jit.py
+++ b/miasm/arch/mep/jit.py
@@ -20,7 +20,7 @@ log.setLevel(logging.CRITICAL)
 
 class mep_CGen(CGen):
     """
-    Translate a bloc containing MeP instructions to C
+    Translate a block containing MeP instructions to C
 
     Note: it is used to emulate the *REPEAT instructions
     """
@@ -32,7 +32,7 @@ class mep_CGen(CGen):
         self.init_arch_C()
 
     def gen_pre_code(self, attrib):
-        """Generate C code inserted before the current bloc"""
+        """Generate C code inserted before the current block"""
 
         # Call the base class method
         out = super(mep_CGen, self).gen_pre_code(attrib)
@@ -44,7 +44,7 @@ class mep_CGen(CGen):
         return out
 
     def gen_post_code(self, attrib, pc_value):
-        """Generate C code inserted after the current bloc"""
+        """Generate C code inserted after the current block"""
 
         # Call the base class method
         out = super(mep_CGen, self).gen_post_code(attrib, pc_value)
diff --git a/miasm/arch/mep/sem.py b/miasm/arch/mep/sem.py
index 13a4d6ca..1736b139 100644
--- a/miasm/arch/mep/sem.py
+++ b/miasm/arch/mep/sem.py
@@ -1162,7 +1162,7 @@ class ir_mepb(IntermediateRepresentation):
     def get_next_break_loc_key(self, instr):
         """Returns a new label that identifies where the instruction is going.
 
-           Note: it eases linking IR blocs
+           Note: it eases linking IR blocks
         """
 
         l = self.loc_db.get_or_create_offset_location(instr.offset + instr.l)
diff --git a/miasm/core/asmblock.py b/miasm/core/asmblock.py
index 0e715f41..7f3265e0 100644
--- a/miasm/core/asmblock.py
+++ b/miasm/core/asmblock.py
@@ -176,19 +176,19 @@ class AsmBlock(object):
         offset = loc_db.get_location_offset(loc_key)
         if offset not in offsets:
             log_asmblock.warning(
-                'cannot split bloc at %X ' % offset +
+                'cannot split block at %X ' % offset +
                 'middle instruction? default middle')
             offsets.sort()
             return None
-        new_bloc = AsmBlock(loc_key)
+        new_block = AsmBlock(loc_key)
         i = offsets.index(offset)
 
-        self.lines, new_bloc.lines = self.lines[:i], self.lines[i:]
+        self.lines, new_block.lines = self.lines[:i], self.lines[i:]
         flow_mod_instr = self.get_flow_instr()
         log_asmblock.debug('flow mod %r', flow_mod_instr)
         c = AsmConstraint(loc_key, AsmConstraint.c_next)
-        # move dst if flowgraph modifier was in original bloc
-        # (usecase: split delayslot bloc)
+        # move dst if flowgraph modifier was in original block
+        # (usecase: split delayslot block)
         if flow_mod_instr:
             for xx in self.bto:
                 log_asmblock.debug('lbl %s', xx)
@@ -197,11 +197,11 @@ class AsmBlock(object):
             )
             c_to = [x for x in self.bto if x.c_t != AsmConstraint.c_next]
             self.bto = set([c] + c_to)
-            new_bloc.bto = c_next
+            new_block.bto = c_next
         else:
-            new_bloc.bto = self.bto
+            new_block.bto = self.bto
             self.bto = set([c])
-        return new_bloc
+        return new_block
 
     def get_range(self):
         """Returns the offset hull of an AsmBlock"""
@@ -738,7 +738,7 @@ class AsmCFG(DiGraph):
                              if dloc_key == loc_key)
 
             if len(pred_next) > 1:
-                raise RuntimeError("Too many next constraints for bloc %r"
+                raise RuntimeError("Too many next constraints for block %r"
                                    "(%s)" % (loc_key,
                                              pred_next))
 
@@ -1578,7 +1578,7 @@ class disasmEngine(object):
         @blocks: (optional) AsmCFG instance of already disassembled blocks to
                 merge with
         """
-        log_asmblock.info("dis bloc all")
+        log_asmblock.info("dis block all")
         job_done = set()
         if blocks is None:
             blocks = AsmCFG(self.loc_db)
diff --git a/miasm/core/parse_asm.py b/miasm/core/parse_asm.py
index 2e843474..2b4f1195 100644
--- a/miasm/core/parse_asm.py
+++ b/miasm/core/parse_asm.py
@@ -237,7 +237,7 @@ def parse_txt(mnemo, attrib, txt, loc_db=None):
             else:
                 cur_block = asmblock.AsmBlock(line, alignment=mnemo.alignment)
                 i += 1
-            # Generate the current bloc
+            # Generate the current block
             asmcfg.add_block(cur_block)
             state = STATE_IN_BLOC
             if block_to_nlink:
diff --git a/miasm/ir/ir.py b/miasm/ir/ir.py
index 372b712a..1ddcaab5 100644
--- a/miasm/ir/ir.py
+++ b/miasm/ir/ir.py
@@ -641,7 +641,7 @@ class IRCFG(DiGraph):
 
     def get_rw(self, regs_ids=None):
         """
-        Calls get_rw(irb) for each bloc
+        Calls get_rw(irb) for each block
         @regs_ids : ids of registers used in IR
         """
         if regs_ids is None:
@@ -703,7 +703,7 @@ class DiGraphIR(IRCFG):
 
     def __init__(self, *args, **kwargs):
         warnings.warn('DEPRECATION WARNING: use "IRCFG" instead of "DiGraphIR"')
-        raise NotImplementedError("Depreceated")
+        raise NotImplementedError("Deprecated")
 
 
 class IntermediateRepresentation(object):
diff --git a/miasm/ir/symbexec.py b/miasm/ir/symbexec.py
index 23df0ffb..f9671f70 100644
--- a/miasm/ir/symbexec.py
+++ b/miasm/ir/symbexec.py
@@ -239,7 +239,7 @@ class MemArray(MutableMapping):
             data = ExprMem(ptr, 8)
             parts.append((0, 1, data))
 
-        # Group similar datas
+        # Group similar data
         # XXX TODO: only little endian here
         index = 0
         while index + 1 < len(parts):
@@ -281,7 +281,7 @@ class MemArray(MutableMapping):
 
             index += 1
 
-        # Slice datas
+        # Slice data
         read_mem = []
         for off, bytesize, data in parts:
             if data.size // 8 != bytesize:
diff --git a/miasm/jitter/jitcore_gcc.py b/miasm/jitter/jitcore_gcc.py
index 292143a2..1520cf38 100644
--- a/miasm/jitter/jitcore_gcc.py
+++ b/miasm/jitter/jitcore_gcc.py
@@ -41,7 +41,7 @@ class JitCore_Gcc(JitCore_Cc_Base):
         self.states[offset] = lib
 
     def add_block(self, block):
-        """Add a bloc to JiT and JiT it.
+        """Add a block to JiT and JiT it.
         @block: block to jit
         """
         block_hash = self.hash_block(block)
diff --git a/miasm/jitter/jitload.py b/miasm/jitter/jitload.py
index 292cf498..0d8ab722 100644
--- a/miasm/jitter/jitload.py
+++ b/miasm/jitter/jitload.py
@@ -372,7 +372,7 @@ class Jitter(object):
         # Exceptions should never be activated before run
         assert(self.get_exception() == 0)
 
-        # Run the bloc at PC
+        # Run the block at PC
         self.pc = self.run_at(self.pc)
 
         # Check exceptions (raised by the execution of the block)
diff --git a/miasm/jitter/llvmconvert.py b/miasm/jitter/llvmconvert.py
index c4467411..d23f075b 100644
--- a/miasm/jitter/llvmconvert.py
+++ b/miasm/jitter/llvmconvert.py
@@ -1341,7 +1341,7 @@ class LLVMFunction(object):
         current_main_stream = self.main_stream
         self.main_stream = False
 
-        # Then Bloc
+        # Then Block
         builder.position_at_end(then_block)
         PC = self.llvm_context.PC
         if isinstance(offset, int_types):
@@ -1393,7 +1393,7 @@ class LLVMFunction(object):
         current_main_stream = self.main_stream
         self.main_stream = False
 
-        # Then Bloc
+        # Then Block
         builder.position_at_end(then_block)
         PC = self.llvm_context.PC
         if isinstance(offset, int_types):
diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py
index ecca3eac..259aca7c 100644
--- a/test/analysis/data_flow.py
+++ b/test/analysis/data_flow.py
@@ -531,7 +531,7 @@ G15_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a)]])
 for irb in [G15_EXP_IRB0, G15_EXP_IRB1]:
     G15_EXP_IRA.add_irblock(irb)
 
-# graph 16 : Graph where variable assigned multiple times in the same bloc
+# graph 16 : Graph where variable assigned multiple times in the same block
 
 G16_IRA = IRA.new_ircfg()
 
diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py
index 345f979a..69b93f69 100644
--- a/test/analysis/depgraph.py
+++ b/test/analysis/depgraph.py
@@ -693,7 +693,7 @@ G10_TEST1_0_DN1 = DependencyNode(
 G10_INPUT = (set([G10_TEST1_0_DN1]), set([G10_IRB1.loc_key]))
 
 
-# Test 11: no dual bloc emulation
+# Test 11: no dual block emulation
 
 G11_TEST1_DN1 = DependencyNode(
     G11_IRB2.loc_key, A, len(G11_IRB2))