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| author | IridiumXOR <oliveriandrea@gmail.com> | 2020-09-23 14:11:42 +0200 |
|---|---|---|
| committer | IridiumXOR <oliveriandrea@gmail.com> | 2020-09-23 14:11:42 +0200 |
| commit | a485052e519913face16e50738dd40426d77d87c (patch) | |
| tree | 7cf9fc370b873a9f99826dcddfcae26b8eff8db9 | |
| parent | bf9f5b29336eb023c9efb260e6458ca9689344f6 (diff) | |
| download | miasm-a485052e519913face16e50738dd40426d77d87c.tar.gz miasm-a485052e519913face16e50738dd40426d77d87c.zip | |
Add test units
| -rw-r--r-- | miasm/arch/aarch64/arch.py | 3 | ||||
| -rw-r--r-- | test/arch/aarch64/arch.py | 10 |
2 files changed, 12 insertions, 1 deletions
diff --git a/miasm/arch/aarch64/arch.py b/miasm/arch/aarch64/arch.py index 19487148..e32fcdd6 100644 --- a/miasm/arch/aarch64/arch.py +++ b/miasm/arch/aarch64/arch.py @@ -1736,6 +1736,7 @@ simm6 = bs(l=6, cls=(aarch64_int64_noarg, aarch64_arg), fname="imm", order=-1) simm9 = bs(l=9, cls=(aarch64_int64_noarg,), fname="imm", order=-1) simm7 = bs(l=7, cls=(aarch64_int64_noarg,), fname="imm", order=-1) nzcv = bs(l=4, cls=(aarch64_uint64_noarg, aarch64_arg), fname="nzcv", order=-1) +uimm4 = bs(l=4, cls=(aarch64_uint64_noarg, aarch64_arg), fname="imm", order=-1) uimm5 = bs(l=5, cls=(aarch64_uint64_noarg, aarch64_arg), fname="imm", order=-1) uimm12 = bs(l=12, cls=(aarch64_uint64_noarg,), fname="imm", order=-1) uimm16 = bs(l=16, cls=(aarch64_uint64_noarg, aarch64_arg), fname="imm", order=-1) @@ -2195,7 +2196,7 @@ aarch64op("dsb", [bs('1101010100'), bs('0000110011'), crm, bs('1'), bs('00'), bs aarch64op("dmb", [bs('1101010100'), bs('0000110011'), crm, bs('1'), bs('01'), bs('11111')], [crm]) aarch64op("isb", [bs('1101010100'), bs('0000110011'), crm, bs('1'), bs('10'), bs('11111')], [crm]) aarch64op("ic", [bs('1101010100'), bs('0'), bs('01'), op1, bs('0111'), crm, op2, rt64], [op1, crm, op2, rt64]) -aarch64op('clrex', [bs('1101010100'), bs('0'), bs('00'), bs('011'), bs('0011'), crm, bs('010'), bs('11111')], [crm]) +aarch64op('clrex', [bs('1101010100'), bs('0'), bs('00'), bs('011'), bs('0011'), uimm4, bs('010'), bs('11111')], [uimm4]) aarch64op("tlbi", [bs('1101010100'), bs('0'), bs('01'), op1, bs('1000'), crm, op2, rt64], [op1, crm, op2, rt64]) aarch64op('yield', [bs('1101010100'), bs('0'), bs('00'), bs('011'), bs('0010'), bs('0000'), bs('001'), bs('11111')], []) diff --git a/test/arch/aarch64/arch.py b/test/arch/aarch64/arch.py index 62105236..c78007b8 100644 --- a/test/arch/aarch64/arch.py +++ b/test/arch/aarch64/arch.py @@ -1823,6 +1823,16 @@ reg_tests_aarch64 = [ ("XXXXXXXX STLXRB W17, W16, [X14]", "D0FD1108"), + ("XXXXXXXX STLRB W1, [X0]", + "01FC9F08"), + ("XXXXXXXX IC 0x0, c1, 0x0, XZR", + "1F7108D5"), + ("XXXXXXXX CLREX 0xF", + "5F3F03D5"), + ("XXXXXXXX TLBI 0x0, c7, 0x0, XZR", + "1F8708D5"), + ("XXXXXXXX YIELD ", + "3F2003D5") ] |