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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-11-11 15:18:40 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-11-11 15:18:40 +0100 |
| commit | 0260b3177e01bfa70ef7ceadbbad278b4bfb762a (patch) | |
| tree | 879e40f66c6ef07e3746993eee2b00d9d86eb0f6 | |
| parent | b82d9d15d4040c568734b5cba949975c01315955 (diff) | |
| download | box64-0260b3177e01bfa70ef7ceadbbad278b4bfb762a.tar.gz box64-0260b3177e01bfa70ef7ceadbbad278b4bfb762a.zip | |
[ARM64_DYNAREC] Fixed OF flags for 8 bit addition when using FLAGM extension
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_emit_math.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_emit_math.c b/src/dynarec/arm64/dynarec_arm64_emit_math.c index 3a7cc285..7bdff9a2 100644 --- a/src/dynarec/arm64/dynarec_arm64_emit_math.c +++ b/src/dynarec/arm64/dynarec_arm64_emit_math.c @@ -290,7 +290,7 @@ void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4) } } ADDw_REG(s1, s1, s2); - if(arm64_flagm) { + if(arm64_flagm && 0) { // disable O flag there, it needs singned 8bits values IFX(X_AF) { BICw_REG(s3, s3, s1); // s3 = (op1 | op2) & ~ res ORRw_REG(s3, s3, s4); // s3 = (op1 & op2) | ((op1 | op2) & ~ res) @@ -331,10 +331,10 @@ void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4) CSETw(s3, cMI); BFIw(xFlags, s3, F_SF, 1); } - IFX(X_OF) { + /*IFX(X_OF) { CSETw(s3, cVS); BFIw(xFlags, s3, F_OF, 1); - } + }*/ } else { IFX(X_ZF) { ANDSw_mask(s1, s1, 0, 7); //mask=0xff |