Reworked a bit privileged instruction ([32BITS] too)(ARM64_DYNAREC] too)

4 files changed, 41 insertions, 40 deletions

diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c
index 77a20622..5375e78a 100755
--- a/src/dynarec/arm64/dynarec_arm64_00.c
+++ b/src/dynarec/arm64/dynarec_arm64_00.c
@@ -787,31 +787,15 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
 
         case 0x6D:
-            if(rex.is32bits) {
-                if(rep) {
-                    // Faking port read
-                    INST_NAME("REP INSD");
-                    CBZx_NEXT(xRCX);
-                    TBNZ_MARK2(xFlags, F_DF);
-                    MARK;   // Part with DF==0
-                    STRH_S9_postindex(xZR, xRDI, 4);
-                    SUBx_U12(xRCX, xRCX, 1);
-                    CBNZx_MARK(xRCX);
-                    B_NEXT_nocond;
-                    MARK2;  // Part with DF==1
-                    STRH_S9_postindex(xZR, xRDI, -4);
-                    SUBx_U12(xRCX, xRCX, 1);
-                    CBNZx_MARK2(xRCX);
-                    // done
-                } else {
-                    INST_NAME("INSD");
-                    GETDIR(x3, 4);
-                    STRH_U12(xZR, xRDI, 0);
-                    ADDx_REG(xRDI, xRDI, x3);
-                }
-            } else {
-                DEFAULT;
-            }
+            INST_NAME("INSD");
+            SETFLAGS(X_ALL, SF_SET);    // Hack to set flags in "don't care" state
+            GETIP(ip);
+            STORE_XEMU_CALL(xRIP);
+            CALL(native_priv, -1);
+            LOAD_XEMU_CALL(xRIP);
+            jump_to_epilog(dyn, 0, xRIP, ninst);
+            *need_epilog = 0;
+            *ok = 0;
             break;
 
         #define GO(GETFLAGS, NO, YES, F)                                \
@@ -2507,13 +2491,19 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             *ok = 0;
             break;
 
-        case 0xEF:
-            if(rex.is32bits) {
-                INST_NAME("OUT dx, eax");
-                //NOP
-            } else {
-                DEFAULT;
-            }
+        case 0xEC:                      /* IN AL, DX */
+        case 0xED:                      /* IN EAX, DX */
+        case 0xEE:                      /* OUT DX, AL */
+        case 0xEF:                      /* OUT DX, EAX */
+            INST_NAME(opcode==0xEC?"IN AL, DX":(opcode==0xED?"IN EAX, DX":(opcode==0xEE?"OUT DX? AL":"OUT DX, EAX")));
+            SETFLAGS(X_ALL, SF_SET);    // Hack to set flags in "don't care" state
+            GETIP(ip);
+            STORE_XEMU_CALL(xRIP);
+            CALL(native_priv, -1);
+            LOAD_XEMU_CALL(xRIP);
+            jump_to_epilog(dyn, 0, xRIP, ninst);
+            *need_epilog = 0;
+            *ok = 0;
             break;
 
         case 0xF0:
@@ -2759,7 +2749,18 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             SET_DFNONE(x1);
             ORRx_mask(xFlags, xFlags, 1, 0, 0); // xFlags | 1
             break;
-
+        case 0xFA:                      /* STI */
+        case 0xFB:                      /* CLI */
+            INST_NAME(opcode==0xFA?"CLI":"STI");
+            SETFLAGS(X_ALL, SF_SET);    // Hack to set flags in "don't care" state
+            GETIP(ip);
+            STORE_XEMU_CALL(xRIP);
+            CALL(native_priv, -1);
+            LOAD_XEMU_CALL(xRIP);
+            jump_to_epilog(dyn, 0, xRIP, ninst);
+            *need_epilog = 0;
+            *ok = 0;
+            break;
         case 0xFC:
             INST_NAME("CLD");
             BFCw(xFlags, F_DF, 1);
diff --git a/src/dynarec/dynarec_native_functions.c b/src/dynarec/dynarec_native_functions.c
index d71d8594..4cd26db8 100644
--- a/src/dynarec/dynarec_native_functions.c
+++ b/src/dynarec/dynarec_native_functions.c
@@ -160,12 +160,12 @@ void native_ud(x64emu_t* emu)
 void native_priv(x64emu_t* emu)
 {
     emu->test.test = 0;
-    emit_signal(emu, SIGTRAP, (void*)R_RIP, 1);
+    emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
 }
 
 void native_singlestep(x64emu_t* emu)
 {
-    emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+    emit_signal(emu, SIGTRAP, (void*)R_RIP, 1);
 }
 
 void native_fsave(x64emu_t* emu, uint8_t* ed)
diff --git a/src/emu/x64run.c b/src/emu/x64run.c
index bca01f1f..de927757 100755
--- a/src/emu/x64run.c
+++ b/src/emu/x64run.c
@@ -1626,7 +1626,7 @@ x64emurun:
         case 0xE5:                      /* IN EAX, XX */
         case 0xE6:                      /* OUT XX, AL */
         case 0xE7:                      /* OUT XX, EAX */
-            // this is a privilege opcode on 64bits...
+            // this is a privilege opcode...
             #ifndef TEST_INTERPRETER
             emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
             STEP;
@@ -1656,7 +1656,7 @@ x64emurun:
         case 0xED:                      /* IN EAX, DX */
         case 0xEE:                      /* OUT DX, AL */
         case 0xEF:                      /* OUT DX, EAX */
-            // this is a privilege opcode on 64bits...
+            // this is a privilege opcode...
             #ifndef TEST_INTERPRETER
             emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
             STEP;
@@ -1800,12 +1800,12 @@ x64emurun:
             SET_FLAG(F_CF);
             break;
         case 0xFA:                      /* CLI */
-            // this is a privilege opcode on 64bits...
+            // this is a privilege opcode
             emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
             STEP;
             break;
         case 0xFB:                      /* STI */
-            // this is a privilege opcode on 64bits...
+            // this is a privilege opcode
             emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
             STEP;
             break;
diff --git a/src/libtools/signals.c b/src/libtools/signals.c
index a5804b9e..f66896e2 100755
--- a/src/libtools/signals.c
+++ b/src/libtools/signals.c
@@ -724,7 +724,7 @@ void my_sigactionhandler_oldcode(int32_t sig, int simple, siginfo_t* info, void
             else
                 sigcontext->uc_mcontext.gregs[X64_TRAPNO] = 14; // PAGE_FAULT
         } else {
-            sigcontext->uc_mcontext.gregs[X64_TRAPNO] = (info->si_code == SEGV_ACCERR)?13:14;
+            sigcontext->uc_mcontext.gregs[X64_TRAPNO] = (info->si_code == SEGV_ACCERR)?14:13;
             //X64_ERR seems to be INT:8 CODE:8. So for write access segfault it's 0x0002 For a read it's 0x0004 (and 8 for exec). For an int 2d it could be 0x2D01 for example
             sigcontext->uc_mcontext.gregs[X64_ERR] = 0x0004;    // read error? there is no execute control in box64 anyway
         }