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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-06-18 14:19:16 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-06-18 14:19:16 +0200 |
| commit | 17364dc4459a33b66c0eb3777c50dea641c4254d (patch) | |
| tree | 15539ff03420bbd3be1dc771fe2109284292b513 | |
| parent | 59dd97cb72b1a4142ddd61eea36170de4ffff926 (diff) | |
| download | box64-17364dc4459a33b66c0eb3777c50dea641c4254d.tar.gz box64-17364dc4459a33b66c0eb3777c50dea641c4254d.zip | |
[32BITS] Fixed an issue with 66 A1/A3 opcodes
| -rw-r--r-- | src/emu/x64run66.c | 24 | ||||
| -rw-r--r-- | src/tools/my_cpuid.c | 6 |
2 files changed, 20 insertions, 10 deletions
diff --git a/src/emu/x64run66.c b/src/emu/x64run66.c index 3698911f..508ca243 100644 --- a/src/emu/x64run66.c +++ b/src/emu/x64run66.c @@ -315,17 +315,25 @@ uintptr_t Run66(x64emu_t *emu, rex_t rex, int rep, uintptr_t addr) break; case 0xA1: /* MOV EAX,Od */ - if(rex.w) - R_RAX = *(uint64_t*)F64; - else - R_AX = *(uint16_t*)F64; + if(rex.is32bits) { + R_EAX = *(uint32_t*)(uintptr_t)F32; + } else { + if(rex.w) + R_RAX = *(uint64_t*)F64; + else + R_AX = *(uint16_t*)F64; + } break; case 0xA3: /* MOV Od,EAX */ - if(rex.w) - *(uint64_t*)F64 = R_RAX; - else - *(uint16_t*)F64 = R_AX; + if(rex.is32bits) { + *(uint32_t*)(uintptr_t)F32 = R_EAX; + } else { + if(rex.w) + *(uint64_t*)F64 = R_RAX; + else + *(uint16_t*)F64 = R_AX; + } break; case 0xA5: /* (REP) MOVSW */ diff --git a/src/tools/my_cpuid.c b/src/tools/my_cpuid.c index 5454e5c4..c80a5312 100644 --- a/src/tools/my_cpuid.c +++ b/src/tools/my_cpuid.c @@ -146,8 +146,10 @@ void my_cpuid(x64emu_t* emu, uint32_t tmp32u) R_EDX = 0; break; case 0x7: // extended bits... - if(R_ECX==1) R_EAX = 0; // Bit 5 is avx512_bf16 - else R_EAX = R_ECX = R_EBX = R_EDX = 0; // TODO + if(R_ECX==1) { + R_EAX = 0; // Bit 5 is avx512_bf16 + } else + R_EAX = R_ECX = R_EBX = R_EDX = 0; // TODO break; case 0xB: // Extended Topology Enumeration Leaf //TODO! |