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authorptitSeb <sebastien.chev@gmail.com>2022-02-27 14:14:28 +0100
committerGitHub <noreply@github.com>2022-02-27 14:14:28 +0100
commit24b781a6412e8b0ed22d2f59ae6b52304a69229b (patch)
tree32b8e4f4a95c976a58dd94b2136099538142f15a
parent3ceff2ce2e6af3db1741411c3a47b1da8100ae1b (diff)
parentb932ad8c657576e21e1c9cc0e31acdd9c01fb640 (diff)
downloadbox64-24b781a6412e8b0ed22d2f59ae6b52304a69229b.tar.gz
box64-24b781a6412e8b0ed22d2f59ae6b52304a69229b.zip
Merge pull request #199 from Alexmitter/main
Add initial RISCV support
-rwxr-xr-xCMakeLists.txt10
-rwxr-xr-xdocs/COMPILE.md16
-rwxr-xr-xsrc/include/myalign.h4
3 files changed, 28 insertions, 2 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt
index f819a043..d9825cb1 100755
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -12,6 +12,7 @@ option(TEGRAX1 "Set to ON if targeting an Tegra X1 based device" ${TEGRAX1})
 option(PHYTIUM "Set to ON if targeting an Phytium (D2000 or FT2000/4) based device" ${PHYTIUM})
 option(SD845 "Set to ON if targeting a Snapragon 845 based device" ${SD845})
 option(LARCH64 "Set to ON if targeting an Loongarch64 based device" ${LARCH64})
+option(RV64 "Set to ON if targeting an RISCV RV64G based device" ${RV64})
 option(PPC64LE "Set to ON if targeting an PowerPC 64 LE based device" ${PPC64LE})
 option(LX2160A "Set to ON if targeting an LX2160A based device" ${LX2160A})
 option(USE_CCACHE "Set to ON to use ccache if present in the system" ${USE_CCACHE})
@@ -23,6 +24,11 @@ if(LARCH64)
     set(NOALIGN OFF CACHE BOOL "")
     set(ARM_DYNAREC OFF CACHE BOOL "")
 endif()
+if(RV64)
+    set(LD80BITS OFF CACHE BOOL "")
+    set(NOALIGN OFF CACHE BOOL "")
+    set(ARM_DYNAREC OFF CACHE BOOL "")  
+endif()
 if(PPC64LE)
     set(LD80BITS OFF CACHE BOOL "")
     set(NOALIGN OFF CACHE BOOL "")
@@ -93,6 +99,10 @@ elseif(LARCH64)
     add_definitions(-DLA464)
     add_definitions(-pipe -march=loongarch64)
     set(CMAKE_ASM_FLAGS  "-pipe -march=loongarch64")
+elseif(RV64)
+    add_definitions(-DRV64)
+    add_definitions(-pipe -march=rv64g)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=rv64g")
 elseif(PPC64LE)
     add_definitions(-DPPC64LE)
 elseif(LX2160A)
diff --git a/docs/COMPILE.md b/docs/COMPILE.md
index e456dc3a..0238a040 100755
--- a/docs/COMPILE.md
+++ b/docs/COMPILE.md
@@ -100,6 +100,22 @@ If it's the first install, you also need:
 sudo systemctl restart systemd-binfmt

 ```

 

+#### for RISCV

+

+Using a 64bits OS:

+

+```

+git clone https://github.com/ptitSeb/box64

+cd box64

+mkdir build; cd build; cmake .. -DRV64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo

+make -j4

+sudo make install

+```

+If it's the first install, you also need:

+```

+sudo systemctl restart systemd-binfmt

+```

+

 #### for PowerPC 64 LE

 

 Using a 64bits OS:

diff --git a/src/include/myalign.h b/src/include/myalign.h
index 47072bc9..d627b25d 100755
--- a/src/include/myalign.h
+++ b/src/include/myalign.h
@@ -90,7 +90,7 @@ typedef struct  va_list {
     memcpy(&p[6], emu->xmm, 8*16);                                      \
   }
 
-#elif defined(__loongarch64) || defined(__powerpc64__)
+#elif defined(__loongarch64) || defined(__powerpc64__) || defined(__riscv)
 #define CREATE_SYSV_VALIST(A) \
   va_list sysv_varargs = (va_list)A
 // not creating CONVERT_VALIST(A) on purpose
@@ -170,4 +170,4 @@ void AlignEpollEvent(void* dest, void* source, int nbr); // x86 -> Arm
 void UnalignSemidDs(void *dest, const void* source);
 void AlignSemidDs(void *dest, const void* source);
 
-uintptr_t getVArgs(x64emu_t* emu, int pos, uintptr_t* b, int N);
\ No newline at end of file
+uintptr_t getVArgs(x64emu_t* emu, int pos, uintptr_t* b, int N);