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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2024-09-19 14:11:02 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-19 08:11:02 +0200 |
| commit | 35d17abeb0dfcd2009cedff7f6d0c71de182caec (patch) | |
| tree | 776447ebe2f2f7a1b6aea3e3262b0cf7f571816d | |
| parent | 33472d3a8e3ac8a81acd8cc16348a77e76935ebb (diff) | |
| download | box64-35d17abeb0dfcd2009cedff7f6d0c71de182caec.tar.gz box64-35d17abeb0dfcd2009cedff7f6d0c71de182caec.zip | |
[RV64_DYNAREC] Fixed more unaligned issues for vector (#1835)
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_0f_vector.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_0f_vector.c b/src/dynarec/rv64/dynarec_rv64_0f_vector.c index dfa2b703..a6c85e53 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f_vector.c +++ b/src/dynarec/rv64/dynarec_rv64_0f_vector.c @@ -63,13 +63,14 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, INST_NAME("MOVUPS Gx, Ex"); nextop = F8; GETG; - SET_ELEMENT_WIDTH(x1, VECTOR_SEWANY, 1); if (MODREG) { + SET_ELEMENT_WIDTH(x1, VECTOR_SEWANY, 1); ed = (nextop & 7) + (rex.b << 3); v1 = sse_get_reg_vector(dyn, ninst, x1, ed, 0, dyn->vector_eew); v0 = sse_get_reg_empty_vector(dyn, ninst, x1, gd); VMV_V_V(v0, v1); } else { + SET_ELEMENT_WIDTH(x1, VECTOR_SEW8, 1); // unaligned! SMREAD(); v0 = sse_get_reg_empty_vector(dyn, ninst, x1, gd); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 0, 0); @@ -79,13 +80,15 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, case 0x11: INST_NAME("MOVUPS Ex, Gx"); nextop = F8; - SET_ELEMENT_WIDTH(x1, VECTOR_SEWANY, 1); - GETGX_vector(v0, 0, dyn->vector_eew); if (MODREG) { + SET_ELEMENT_WIDTH(x1, VECTOR_SEWANY, 1); + GETGX_vector(v0, 0, dyn->vector_eew); ed = (nextop & 7) + (rex.b << 3); v1 = sse_get_reg_empty_vector(dyn, ninst, x1, ed); VMV_V_V(v1, v0); } else { + SET_ELEMENT_WIDTH(x1, VECTOR_SEW8, 1); // unaligned! + GETGX_vector(v0, 0, dyn->vector_eew); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 0, 0); VSE_V(v0, ed, dyn->vector_eew, VECTOR_UNMASKED, VECTOR_NFIELD1); SMWRITE2(); |