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authorYang Liu <liuyang22@iscas.ac.cn>2023-04-13 20:47:20 +0800
committerGitHub <noreply@github.com>2023-04-13 14:47:20 +0200
commit3bf4a93a4469dc2da9e99925955c71eaefed953b (patch)
tree0a96c85107f32dcc8529ab3b268ed0e1fd9fa787
parent6460447ae92f2fdb63144e4cc9128205cbfbaefd (diff)
downloadbox64-3bf4a93a4469dc2da9e99925955c71eaefed953b.tar.gz
box64-3bf4a93a4469dc2da9e99925955c71eaefed953b.zip
[RV64_DYNAREC] Added 0F AE /0,/1 opcodes (#696)
-rw-r--r--src/dynarec/rv64/dynarec_rv64_0f.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c
index 72c61e4a..3cded7b4 100644
--- a/src/dynarec/rv64/dynarec_rv64_0f.c
+++ b/src/dynarec/rv64/dynarec_rv64_0f.c
@@ -531,7 +531,31 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 SMDMB();
             } else {
                 switch((nextop>>3)&7) {
-                    case 2:                 
+                    case 0:
+                        INST_NAME("FXSAVE Ed");
+                        MESSAGE(LOG_DUMP, "Need Optimization\n");
+                        fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
+                        if(MODREG) {
+                            DEFAULT;
+                        } else {
+                            addr = geted(dyn, addr, ninst, nextop, &ed, x1, x3, &fixedaddress, rex, NULL, 0, 0);
+                            if(ed!=x1) {MV(x1, ed);}
+                            CALL(rex.w?((void*)fpu_fxsave64):((void*)fpu_fxsave32), -1);
+                        }
+                        break;
+                    case 1:
+                        INST_NAME("FXRSTOR Ed");
+                        MESSAGE(LOG_DUMP, "Need Optimization\n");
+                        fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
+                        if(MODREG) {
+                            DEFAULT;
+                        } else {
+                            addr = geted(dyn, addr, ninst, nextop, &ed, x1, x3, &fixedaddress, rex, NULL, 0, 0);
+                            if(ed!=x1) {MV(x1, ed);}
+                            CALL(rex.w?((void*)fpu_fxrstor64):((void*)fpu_fxrstor32), -1);
+                        }
+                        break;
+                    case 2:
                         INST_NAME("LDMXCSR Md");
                         GETED(0);
                         SW(ed, xEmu, offsetof(x64emu_t, mxcsr));