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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-03-21 18:17:19 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-03-21 18:17:19 +0100 |
| commit | 3d400cf91b0de5eddaee5a68fdbbd2f1cfeaee70 (patch) | |
| tree | 8567d2eb9f0ff73a5f6c5b188c99244082868a0b | |
| parent | a77093e154af900d2fc31700a2d0ec9934916214 (diff) | |
| download | box64-3d400cf91b0de5eddaee5a68fdbbd2f1cfeaee70.tar.gz box64-3d400cf91b0de5eddaee5a68fdbbd2f1cfeaee70.zip | |
[DYNAREC] Fixed call_c helper with SSE args
| -rwxr-xr-x | src/dynarec/dynarec_arm64_helper.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/dynarec/dynarec_arm64_helper.c b/src/dynarec/dynarec_arm64_helper.c index 49c4ab2c..5b8ebd2b 100755 --- a/src/dynarec/dynarec_arm64_helper.c +++ b/src/dynarec/dynarec_arm64_helper.c @@ -331,6 +331,10 @@ void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int save { if(savereg==0) savereg = 7; + if(saveflags) { + STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags)); + } + fpu_pushcache(dyn, ninst, reg); if(ret!=-2) { STPx_S7_preindex(xEmu, savereg, xSP, -16); // ARM64 stack needs to be 16byte aligned STPx_S7_offset(xRAX, xRCX, xEmu, offsetof(x64emu_t, regs[_AX])); // x9..x15, x16,x17,x18 those needs to be saved by caller @@ -339,13 +343,8 @@ void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int save STPx_S7_offset(xRSI, xRDI, xEmu, offsetof(x64emu_t, regs[_SI])); STRx_U12(xR8, xEmu, offsetof(x64emu_t, regs[_R8])); } - fpu_pushcache(dyn, ninst, reg); - if(saveflags) { - STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags)); - } TABLE64(reg, (uintptr_t)fnc); BLR(reg); - fpu_popcache(dyn, ninst, reg); if(ret>=0) { MOVx_REG(ret, xEmu); } @@ -367,6 +366,7 @@ void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int save LDRx_U12(xR8, xEmu, offsetof(x64emu_t, regs[_R8])); } } + fpu_popcache(dyn, ninst, reg); if(saveflags) { LDRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags)); } |