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| author | xctan <xctan@cirno.icu> | 2024-08-10 16:51:44 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-10 10:51:44 +0200 |
| commit | 4c0a25db2aa58a3d69a84cff9d4e701c8fcd32d3 (patch) | |
| tree | a64be21b675622fb55462f20a6d156dc321c1635 | |
| parent | 67af8c2badb80e10f3efd4d07b7e1d75d987e72e (diff) | |
| download | box64-4c0a25db2aa58a3d69a84cff9d4e701c8fcd32d3.tar.gz box64-4c0a25db2aa58a3d69a84cff9d4e701c8fcd32d3.zip | |
[RV64_DYNAREC] Fixed ROL/ROR RCX, CL (#1729)
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_00_3.c | 6 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_emit_shift.c | 30 |
2 files changed, 14 insertions, 22 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_00_3.c b/src/dynarec/rv64/dynarec_rv64_00_3.c index 15346729..f5fd7f9c 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_3.c +++ b/src/dynarec/rv64/dynarec_rv64_00_3.c @@ -692,7 +692,8 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("ROL Ed, CL"); SETFLAGS(X_OF|X_CF, SF_SUBSET); GETED(0); - emit_rol32(dyn, ninst, rex, ed, xRCX, x3, x4); + ANDI(x6, xRCX, rex.w ? 0x3f : 0x1f); + emit_rol32(dyn, ninst, rex, ed, x6, x3, x4); WBACK; if(!wback && !rex.w) ZEROUP(ed); break; @@ -700,7 +701,8 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("ROR Ed, CL"); SETFLAGS(X_OF|X_CF, SF_SUBSET); GETED(0); - emit_ror32(dyn, ninst, rex, ed, xRCX, x3, x4); + ANDI(x6, xRCX, rex.w ? 0x3f : 0x1f); + emit_ror32(dyn, ninst, rex, ed, x6, x3, x4); WBACK; if(!wback && !rex.w) ZEROUP(ed); break; diff --git a/src/dynarec/rv64/dynarec_rv64_emit_shift.c b/src/dynarec/rv64/dynarec_rv64_emit_shift.c index 6a3e917e..7f858cf9 100644 --- a/src/dynarec/rv64/dynarec_rv64_emit_shift.c +++ b/src/dynarec/rv64/dynarec_rv64_emit_shift.c @@ -946,15 +946,10 @@ void emit_rol32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s { int64_t j64; - if(rex.w) { - ANDI(s4, s2, 0x3f); - } else { - ANDI(s4, s2, 0x1f); - } if (!rex.w) { ZEROUP(s1); } - BEQ_NEXT(s4, xZR); + BEQ_NEXT(s2, xZR); IFX(X_PEND) { SDxw(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s4, rex.w?d_rol64:d_rol32); @@ -964,14 +959,14 @@ void emit_rol32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if(rv64_zbb) { if (rex.w) { - ROL(s1, s1, s4); + ROL(s1, s1, s2); } else { - ROLW(s1, s1, s4); + ROLW(s1, s1, s2); ZEROUP(s1); } } else { - SLLxw(s3, s1, s4); - NEG(s4, s4); + SLLxw(s3, s1, s2); + NEG(s4, s2); ADDI(s4, s4, rex.w?64:32); SRLxw(s1, s1, s4); OR(s1, s3, s1); @@ -1003,15 +998,10 @@ void emit_ror32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s { int64_t j64; - if(rex.w) { - ANDI(s4, s2, 0x3f); - } else { - ANDI(s4, s2, 0x1f); - } if (!rex.w) { ZEROUP(s1); } - BEQ_NEXT(s4, xZR); + BEQ_NEXT(s2, xZR); IFX(X_PEND) { SDxw(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s4, rex.w?d_ror64:d_ror32); @@ -1021,14 +1011,14 @@ void emit_ror32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if(rv64_zbb) { if (rex.w) { - ROR(s1, s1, s4); + ROR(s1, s1, s2); } else { - RORW(s1, s1, s4); + RORW(s1, s1, s2); ZEROUP(s1); } } else { - SRLxw(s3, s1, s4); - NEG(s4, s4); + SRLxw(s3, s1, s2); + NEG(s4, s2); ADDI(s4, s4, rex.w?64:32); SLLxw(s1, s1, s4); OR(s1, s3, s1); |