Merge branch 'main' of https://github.com/ptitSeb/box64

7 files changed, 107 insertions, 65 deletions

diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c
index 57ebe1f7..e9c5d466 100644
--- a/src/dynarec/arm64/dynarec_arm64_660f.c
+++ b/src/dynarec/arm64/dynarec_arm64_660f.c
@@ -2287,7 +2287,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             if(MODREG) {

                 if(rex.rex) {

                     eb1 = xRAX+(nextop&7)+(rex.b<<3);

-                    eb2 = 0;                \

+                    eb2 = 0;

                 } else {

                     ed = (nextop&7);

                     eb1 = xRAX+(ed&3);  // Ax, Cx, Dx or Bx

diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c
index 0123927c..360cd9dd 100644
--- a/src/dynarec/rv64/dynarec_rv64_0f.c
+++ b/src/dynarec/rv64/dynarec_rv64_0f.c
@@ -1599,6 +1599,18 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 SH(x3, gback, gdoffset + 2 * i);
             }
             break;
+        case 0xE7:
+            INST_NAME("MOVNTQ Em, Gm");
+            nextop = F8;
+            gd = (nextop & 0x38) >> 3;
+            if (MODREG) {
+                DEFAULT;
+            } else {
+                v0 = mmx_get_reg(dyn, ninst, x1, x2, x3, gd);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0);
+                FSD(v0, ed, fixedaddress);
+            }
+            break;
         case 0xED:
             INST_NAME("PADDSW Gm,Em");
             nextop = F8;
diff --git a/src/dynarec/rv64/dynarec_rv64_660f.c b/src/dynarec/rv64/dynarec_rv64_660f.c
index bfdbbaa5..f7953c56 100644
--- a/src/dynarec/rv64/dynarec_rv64_660f.c
+++ b/src/dynarec/rv64/dynarec_rv64_660f.c
@@ -2014,7 +2014,32 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             ZEXTH(x2, x2);
             GWBACK;
             break;
-
+        case 0xB6:
+            INST_NAME("MOVZX Gw, Eb");
+            nextop = F8;
+            if (MODREG) {
+                if (rex.rex) {
+                    eb1 = xRAX + (nextop & 7) + (rex.b << 3);
+                    eb2 = 0;
+                } else {
+                    ed = (nextop & 7);
+                    eb1 = xRAX + (ed & 3); // Ax, Cx, Dx or Bx
+                    eb2 = (ed & 4) >> 2;   // L or H
+                }
+                if (eb2) {
+                    SRLI(x1, eb1, 8);
+                    eb1 = x1;
+                }
+                ANDI(x1, eb1, 0xff);
+            } else {
+                SMREAD();
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x4, &fixedaddress, rex, NULL, 1, 0);
+                LBU(x1, ed, fixedaddress);
+            }
+            LUI(x5, 0xffff0);
+            AND(gd, gd, x5);
+            OR(gd, gd, x1);
+            break;
         case 0xBE:
             INST_NAME("MOVSX Gw, Eb");
             nextop = F8;
diff --git a/src/dynarec/rv64/dynarec_rv64_d8.c b/src/dynarec/rv64/dynarec_rv64_d8.c
index f72a7883..c9372ee7 100644
--- a/src/dynarec/rv64/dynarec_rv64_d8.c
+++ b/src/dynarec/rv64/dynarec_rv64_d8.c
@@ -54,47 +54,12 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
         case 0xD8 ... 0xDF:
             INST_NAME("FCOMP ST0, STx");
             v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
-            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7));
-            LHU(x3, xEmu, offsetof(x64emu_t, sw));
-            MOV32w(x1, 0b1011100011111111); // mask off c0,c1,c2,c3
-            AND(x3, x3, x1);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7));
             if(ST_IS_F(0)) {
-                FEQS(x5, v1, v1);
-                FEQS(x4, v2, v2);
-                AND(x5, x5, x4);
-                BEQZ(x5, 24); // undefined/NaN
-                FEQS(x5, v1, v2);
-                BNEZ(x5, 28); // equal
-                FLTS(x2, v1, v2); // x2 = (v1<v2)?1:0
-                SLLI(x1, x2, 8);
-                J(20); // end
-                // undefined/NaN
-                LUI(x1, 4);
-                ADDI(x1, x1, 0b010100000000);
-                J(8); // end
-                // equal
-                LUI(x1, 4);
-                // end
+                FCOMS(v1, v2, x1, x2, x3, x4, x5);
             } else {
-                FEQD(x5, v1, v1);
-                FEQD(x4, v2, v2);
-                AND(x5, x5, x4);
-                BEQZ(x5, 24); // undefined/NaN
-                FEQD(x5, v1, v2);
-                BNEZ(x5, 28); // equal
-                FLTD(x2, v1, v2); // x2 = (v1<v2)?1:0
-                SLLI(x1, x2, 8);
-                J(20); // end
-                // undefined/NaN
-                LUI(x1, 4);
-                ADDI(x1, x1, 0b010100000000);
-                J(8); // end
-                // equal
-                LUI(x1, 4);
-                // end
+                FCOMD(v1, v2, x1, x2, x3, x4, x5);
             }
-            OR(x3, x3, x1);
-            SH(x3, xEmu, offsetof(x64emu_t, sw));
             X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xE0 ... 0xE7:
@@ -152,6 +117,33 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                         FMULD(v1, v1, s0);
                     }
                     break;
+                case 2:
+                    INST_NAME("FCOM ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0);
+                    FLW(s0, ed, fixedaddress);
+                    if (ST_IS_F(0)) {
+                        FCOMS(v1, s0, x1, x6, x3, x4, x5);
+                    } else {
+                        FCVTDS(s0, s0);
+                        FCOMD(v1, s0, x1, x6, x3, x4, x5);
+                    }
+                    break;
+                case 3:
+                    INST_NAME("FCOMP ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0);
+                    FLW(s0, ed, fixedaddress);
+                    if (ST_IS_F(0)) {
+                        FCOMS(v1, s0, x1, x6, x3, x4, x5);
+                    } else {
+                        FCVTDS(s0, s0);
+                        FCOMD(v1, s0, x1, x6, x3, x4, x5);
+                    }
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
+                    break;
                 case 4:
                     INST_NAME("FSUB ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
diff --git a/src/dynarec/rv64/dynarec_rv64_da.c b/src/dynarec/rv64/dynarec_rv64_da.c
index 99cdef91..519ba92f 100644
--- a/src/dynarec/rv64/dynarec_rv64_da.c
+++ b/src/dynarec/rv64/dynarec_rv64_da.c
@@ -84,9 +84,17 @@ uintptr_t dynarec64_DA(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
             DEFAULT;
             break;
         case 0xE9:
-            DEFAULT;
+            INST_NAME("FUCOMPP ST0, ST1");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7));
+            v2 = x87_get_st(dyn, ninst, x1, x2, 1, X87_COMBINE(0, nextop & 7));
+            if (ST_IS_F(0)) {
+                FCOMS(v1, v2, x1, x2, x3, x4, x5);
+            } else {
+                FCOMD(v1, v2, x1, x2, x3, x4, x5);
+            }
+            X87_POP_OR_FAIL(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
-
         case 0xE4:
         case 0xF0:
         case 0xF1:
diff --git a/src/dynarec/rv64/dynarec_rv64_dc.c b/src/dynarec/rv64/dynarec_rv64_dc.c
index cc740149..9625cfda 100644
--- a/src/dynarec/rv64/dynarec_rv64_dc.c
+++ b/src/dynarec/rv64/dynarec_rv64_dc.c
@@ -77,29 +77,7 @@ uintptr_t dynarec64_DC(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                     v2 = fpu_get_scratch(dyn);
                     addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 0);
                     FLD(v2, wback, fixedaddress);
-
-                    LHU(x3, xEmu, offsetof(x64emu_t, sw));
-                    MOV32w(x1, 0b1011100011111111); // mask off c0,c1,c2,c3
-                    AND(x3, x3, x1);
-                    FEQD(x5, v1, v1);
-                    FEQD(x4, v2, v2);
-                    AND(x5, x5, x4);
-                    BEQZ(x5, 24); // undefined/NaN
-                    FEQD(x5, v1, v2);
-                    BNEZ(x5, 28); // equal
-                    FLTD(x2, v1, v2); // x3 = (v1<v2)?1:0
-                    SLLI(x1, x2, 8);
-                    J(20); // end
-                    // undefined/NaN
-                    LUI(x1, 4);
-                    ADDI(x1, x1, 0b010100000000);
-                    J(8); // end
-                    // equal
-                    LUI(x1, 4);
-                    // end
-                    OR(x3, x3, x1);
-                    SH(x3, xEmu, offsetof(x64emu_t, sw));
-
+                    FCOMD(v1, v2, x1, x2, x3, x4, x5);
                     X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 6:
diff --git a/src/dynarec/rv64/dynarec_rv64_helper.h b/src/dynarec/rv64/dynarec_rv64_helper.h
index 12881835..0a8de602 100644
--- a/src/dynarec/rv64/dynarec_rv64_helper.h
+++ b/src/dynarec/rv64/dynarec_rv64_helper.h
@@ -1525,4 +1525,31 @@ uintptr_t dynarec64_F30F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             opcode = F8;                           \
         }
 
+
+#define FCOM(w, v1, v2, s1, s2, s3, s4, s5)                    \
+    LHU(s3, xEmu, offsetof(x64emu_t, sw));                     \
+    MOV32w(s1, 0b1011100011111111); /* mask off c0,c1,c2,c3 */ \
+    AND(s3, s3, s1);                                           \
+    FEQ##w(s5, v1, v1);                                        \
+    FEQ##w(s4, v2, v2);                                        \
+    AND(s5, s5, s4);                                           \
+    BEQZ(s5, 24); /* undefined/NaN */                          \
+    FEQ##w(s5, v1, v2);                                        \
+    BNEZ(s5, 28);       /* equal */                            \
+    FLT##w(s2, v1, v2); /* x2 = (v1<v2)?1:0 */                 \
+    SLLI(s1, s2, 8);                                           \
+    J(20); /* end */                                           \
+    /* undefined/NaN */                                        \
+    LUI(s1, 4);                                                \
+    ADDI(s1, s1, 0b010100000000);                              \
+    J(8); /* end */                                            \
+    /* equal */                                                \
+    LUI(s1, 4);                                                \
+    /* end */                                                  \
+    OR(s3, s3, s1);                                            \
+    SH(s3, xEmu, offsetof(x64emu_t, sw));
+
+#define FCOMS(v1, v2, s1, s2, s3, s4, s5) FCOM(S, v1, v2, s1, s2, s3, s4, s5)
+#define FCOMD(v1, v2, s1, s2, s3, s4, s5) FCOM(D, v1, v2, s1, s2, s3, s4, s5)
+
 #endif //__DYNAREC_RV64_HELPER_H__