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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-04-12 21:03:30 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-04-12 21:03:30 +0200 |
| commit | 6573476ea259d3b1fe2b6ed311af44736af7901e (patch) | |
| tree | 4c42c840f136afeef0ea40d26dec35d5d2446bfb | |
| parent | f73430a3f895ee070ada74d791abd50278bae582 (diff) | |
| download | box64-6573476ea259d3b1fe2b6ed311af44736af7901e.tar.gz box64-6573476ea259d3b1fe2b6ed311af44736af7901e.zip | |
[DYNAREC] Fixed adc16 emitter
| -rwxr-xr-x | src/dynarec/dynarec_arm64_emit_math.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/dynarec/dynarec_arm64_emit_math.c b/src/dynarec/dynarec_arm64_emit_math.c index e631305b..67c80185 100755 --- a/src/dynarec/dynarec_arm64_emit_math.c +++ b/src/dynarec/dynarec_arm64_emit_math.c @@ -1257,7 +1257,7 @@ void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4) MSR_nzvc(s3); // load CC into ARM CF ADCw_REG(s1, s1, s2); IFX(X_PEND) { - STRw_REG(s1, xEmu, offsetof(x64emu_t, res)); + STRH_U12(s1, xEmu, offsetof(x64emu_t, res)); } IFX(X_AF|X_OF) { ORRw_REG(s3, s4, s2); // s3 = op1 | op2 |