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authorptitSeb <sebastien.chev@gmail.com>2024-06-03 13:46:30 +0200
committerptitSeb <sebastien.chev@gmail.com>2024-06-03 13:46:30 +0200
commit94ccae727b87dc7a33f3de47e42abad32e438b90 (patch)
tree229ef83cebdc67c2211575d2c47a47816fa3e9fb
parent001e77952e5b55c340b222edba53f7581cde505e (diff)
downloadbox64-94ccae727b87dc7a33f3de47e42abad32e438b90.tar.gz
box64-94ccae727b87dc7a33f3de47e42abad32e438b90.zip
[ARM64_DYNAREC] Fixed AVX Cache transform between internal jump points
-rw-r--r--src/dynarec/arm64/dynarec_arm64_functions.c5
-rw-r--r--src/dynarec/arm64/dynarec_arm64_helper.c7
2 files changed, 7 insertions, 5 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_functions.c b/src/dynarec/arm64/dynarec_arm64_functions.c
index 62523c3e..4ee331ab 100644
--- a/src/dynarec/arm64/dynarec_arm64_functions.c
+++ b/src/dynarec/arm64/dynarec_arm64_functions.c
@@ -561,12 +561,13 @@ void neoncacheUnwind(neoncache_t* cache)
                     break;
                 case NEON_CACHE_XMMR:
                 case NEON_CACHE_XMMW:
-                case NEON_CACHE_YMMR:
-                case NEON_CACHE_YMMW:
                     cache->ssecache[cache->neoncache[i].n].reg = i;
                     cache->ssecache[cache->neoncache[i].n].write = (cache->neoncache[i].t==NEON_CACHE_XMMW)?1:0;
                     ++cache->fpu_reg;
                     break;
+                case NEON_CACHE_YMMR:
+                case NEON_CACHE_YMMW:
+                    break;
                 case NEON_CACHE_ST_F:
                 case NEON_CACHE_ST_D:
                 case NEON_CACHE_ST_I64:
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c
index 9d2fc935..ded87eb3 100644
--- a/src/dynarec/arm64/dynarec_arm64_helper.c
+++ b/src/dynarec/arm64/dynarec_arm64_helper.c
@@ -1910,7 +1910,7 @@ static int findCacheSlot(dynarec_arm_t* dyn, int ninst, int t, int n, neoncache_
 {
     neon_cache_t f;
     f.n = n; f.t = t;
-    for(int i=0; i<24; ++i) {
+    for(int i=0; i<32; ++i) {
         if(cache->neoncache[i].v == f.v)
             return i;
         if(cache->neoncache[i].n == n) {
@@ -1940,6 +1940,7 @@ static int findCacheSlot(dynarec_arm_t* dyn, int ninst, int t, int n, neoncache_
                 case NEON_CACHE_XMMW:
                     if(t==NEON_CACHE_XMMR)
                         return i;
+                    break;
                 case NEON_CACHE_YMMR:
                     if(t==NEON_CACHE_YMMW)
                         return i;
@@ -2181,13 +2182,13 @@ static void fpuCacheTransform(dynarec_arm_t* dyn, int ninst, int s1, int s2, int
         if(j>=0 && findCacheSlot(dyn, ninst, NEON_CACHE_MM, i, &cache_i2)==-1)
             unloadCache(dyn, ninst, stack_cnt, s1, s2, s3, &s1_val, &s2_val, &s3_top, &cache, j, cache.neoncache[j].t, cache.neoncache[j].n);
     }
-    for(int i=0; i<24; ++i) {
+    for(int i=0; i<32; ++i) {
         if(cache.neoncache[i].v)
             if(findCacheSlot(dyn, ninst, cache.neoncache[i].t, cache.neoncache[i].n, &cache_i2)==-1)
                 unloadCache(dyn, ninst, stack_cnt, s1, s2, s3, &s1_val, &s2_val, &s3_top, &cache, i, cache.neoncache[i].t, cache.neoncache[i].n);
     }
     // and now load/swap the missing one
-    for(int i=0; i<24; ++i) {
+    for(int i=0; i<32; ++i) {
         if(cache_i2.neoncache[i].v) {
             if(cache_i2.neoncache[i].v != cache.neoncache[i].v) {
                 int j;