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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-04-08 13:28:21 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-04-08 13:28:21 +0200 |
| commit | 9964a0d9e5b25bfe7e7a5773ef3da7c006a20c03 (patch) | |
| tree | 7bd633dc766d2bc9c670ade4fe7716b410cdb088 | |
| parent | d3e1cff733b9fe91f91dee03e22fc3b8ed0613e4 (diff) | |
| download | box64-9964a0d9e5b25bfe7e7a5773ef3da7c006a20c03.tar.gz box64-9964a0d9e5b25bfe7e7a5773ef3da7c006a20c03.zip | |
[ARM64_DYNREC] Fixed (again) F2 0F E6 opcode
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_f20f.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_f20f.c b/src/dynarec/arm64/dynarec_arm64_f20f.c index 9a6e15f1..976b4c52 100755 --- a/src/dynarec/arm64/dynarec_arm64_f20f.c +++ b/src/dynarec/arm64/dynarec_arm64_f20f.c @@ -437,7 +437,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n MSR_fpsr(x5); ORRw_mask(x4, xZR, 1, 0); //0x80000000 d0 = fpu_get_scratch(dyn); - for(int i=1; i>=0; --i) { + for(int i=0; i<2; ++i) { BFCw(x5, FPSR_IOC, 1); // reset IOC bit MSR_fpsr(x5); if(i) { |