diff options
| author | ptitSeb <sebastien.chev@gmail.com> | 2024-03-07 18:51:53 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-03-07 18:51:53 +0100 |
| commit | 9a4a62ff2ddb9ec6286780f046ea785b2bb54306 (patch) | |
| tree | 53e11eccddf1c8560743d29de019dc0e4e5e9e87 | |
| parent | 4ebc462e23c37d057df7b1e147140b32bf2e586e (diff) | |
| download | box64-9a4a62ff2ddb9ec6286780f046ea785b2bb54306.tar.gz box64-9a4a62ff2ddb9ec6286780f046ea785b2bb54306.zip | |
[ARM64_DYNAREC] Added 0F E1 opcode
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_0f.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index 9e4bd704..0bb9dffc 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -2480,7 +2480,20 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETEM(v1, 0); URHADD_8(v0, v0, v1); break; - + case 0xE1: + INST_NAME("PSRAW Gm,Em"); + nextop = F8; + GETGM(d0); + GETEM(d1, 0); + v0 = fpu_get_scratch(dyn); + v1 = fpu_get_scratch(dyn); + UQXTN_32(v0, d1); + MOVI_32(v1, 15); + UMIN_32(v0, v0, v1); // limit to 0 .. +15 values + NEG_32(v0, v0); + VDUP_16(v0, v0, 0); // only the low 8bits will be used anyway + SSHL_16(d0, d0, v0); + break; case 0xE2: INST_NAME("PSRAD Gm,Em"); nextop = F8; |