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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-06-23 21:00:47 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-06-23 21:00:56 +0200 |
| commit | b263d1a0490a508dbaf6fb0496a7c0ad6fe6e5ed (patch) | |
| tree | d803cd21c16b33481c78c7f7c61fac413ec5b4bd | |
| parent | bb3c647f49417eee7506343b912ccb985b16ae6a (diff) | |
| download | box64-b263d1a0490a508dbaf6fb0496a7c0ad6fe6e5ed.tar.gz box64-b263d1a0490a508dbaf6fb0496a7c0ad6fe6e5ed.zip | |
[32BITS] Added 66 40..4F opcodes
| -rw-r--r-- | src/emu/x64run66.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/emu/x64run66.c b/src/emu/x64run66.c index 905e39d6..34c3183b 100644 --- a/src/emu/x64run66.c +++ b/src/emu/x64run66.c @@ -144,6 +144,29 @@ uintptr_t Run66(x64emu_t *emu, rex_t rex, int rep, uintptr_t addr) cmp16(emu, R_AX, F16); break; + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: /* INC Reg (32bits only) */ + tmp8u = opcode&7; + emu->regs[tmp8u].word[0] = inc16(emu, emu->regs[tmp8u].word[0]); + break; + case 0x48: + case 0x49: + case 0x4A: + case 0x4B: + case 0x4C: + case 0x4D: + case 0x4E: + case 0x4F: /* DEC Reg (32bits only) */ + tmp8u = opcode&7; + emu->regs[tmp8u].word[0] = dec16(emu, emu->regs[tmp8u].word[0]); + break; + case 0x64: /* FS: */ #ifdef TEST_INTERPRETER return Test6664(test, rex, _FS, addr); |