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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-04-08 09:47:59 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-04-08 09:47:59 +0200 |
| commit | b83ab97a8a74d0d138727458a3ab864c86f2c3c6 (patch) | |
| tree | 863013cf53efa2122232f685198814d50f05f148 | |
| parent | 6255932e489af522171d92ec62311f9251c60074 (diff) | |
| download | box64-b83ab97a8a74d0d138727458a3ab864c86f2c3c6.tar.gz box64-b83ab97a8a74d0d138727458a3ab864c86f2c3c6.zip | |
[ARM64_DYNAREC] Fixed F2 0F D0 opcode
| -rwxr-xr-x | src/dynarec/arm64/arm64_emitter.h | 2 | ||||
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_f20f.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index 0d6998ba..221aa07a 100755 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -1068,7 +1068,7 @@ #define FMLA_vector(Q, op, sz, Rm, Rn, Rd) ((Q)<<30 | 0b01110<<24 | (op)<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11001<<11 | 1<<10 | (Rn)<<5 | (Rd)) #define VFMLAS(Sd, Sn, Sm) EMIT(FMLA_vector(0, 0, 0, Sm, Sn, Sd)) #define VFMLAQS(Sd, Sn, Sm) EMIT(FMLA_vector(1, 0, 0, Sm, Sn, Sd)) -#define CFMLAQD(Dd, Dn, Dm) EMIT(FMLA_vector(1, 0, 1, Dm, Dn, Dd)) +#define VFMLAQD(Dd, Dn, Dm) EMIT(FMLA_vector(1, 0, 1, Dm, Dn, Dd)) // DIV #define FDIV_vector(Q, sz, Rm, Rn, Rd) ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11111<<11 | 1<<10 | (Rn)<<5 | (Rd)) diff --git a/src/dynarec/arm64/dynarec_arm64_f20f.c b/src/dynarec/arm64/dynarec_arm64_f20f.c index 31745377..9a6e15f1 100755 --- a/src/dynarec/arm64/dynarec_arm64_f20f.c +++ b/src/dynarec/arm64/dynarec_arm64_f20f.c @@ -402,7 +402,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("ADDSUBPS Gx, Ex"); nextop = F8; GETGX(v0, 1); - GETEXSD(v1, 0, 0); + GETEX(v1, 0, 0); q0 = fpu_get_scratch(dyn); static float addsubps[4] = {-1.f, 1.f, -1.f, 1.f}; MAYUSE(addsubps); |