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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-02-22 10:39:59 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-02-22 10:39:59 +0100 |
| commit | d033f34a456edefaac3dfe0e53802ca8c0241706 (patch) | |
| tree | b98facd99a32af3b3d790831e6f804be71d738fd | |
| parent | f2eb5326af6eabe8b6196279f278f2975094d2d8 (diff) | |
| download | box64-d033f34a456edefaac3dfe0e53802ca8c0241706.tar.gz box64-d033f34a456edefaac3dfe0e53802ca8c0241706.zip | |
[ARM64_DYNAREC] Added 0F E2 opcode
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_0f.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index 57c3e400..a19961bd 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -2458,6 +2458,20 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin URHADD_8(v0, v0, v1); break; + case 0xE2: + INST_NAME("PSRAD Gm,Em"); + nextop = F8; + GETGM(d0); + GETEM(d1, 0); + v0 = fpu_get_scratch(dyn); + v1 = fpu_get_scratch(dyn); + UQXTN_32(v0, d1); + MOVI_32(v1, 31); + UMIN_32(v0, v0, v1); // limit to 0 .. +31 values + NEG_32(v0, v0); + VDUP_32(v0, v0, 0); // only the low 8bits will be used anyway + SSHL_32(d0, d0, v0); + break; case 0xE3: INST_NAME("PAVGW Gm,Em"); nextop = F8; |