diff options
| author | liuli <liuli@uniontech.com> | 2023-12-13 15:11:15 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-13 08:11:15 +0100 |
| commit | d8a19e98327e723588bfac16d6d96e8730c30199 (patch) | |
| tree | 52ff7e8a560ecef43b4deafc3f449dbc52de26cf | |
| parent | 99a938ef379192005943ecc76ba6245ebee4016d (diff) | |
| download | box64-d8a19e98327e723588bfac16d6d96e8730c30199.tar.gz box64-d8a19e98327e723588bfac16d6d96e8730c30199.zip | |
fix emit_shr16 (#1135)
For the SHR instruction, the OF flag is set to the most-significant bit of the original operand.
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_emit_shift.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_emit_shift.c b/src/dynarec/arm64/dynarec_arm64_emit_shift.c index 24f16979..b3803353 100644 --- a/src/dynarec/arm64/dynarec_arm64_emit_shift.c +++ b/src/dynarec/arm64/dynarec_arm64_emit_shift.c @@ -665,7 +665,7 @@ void emit_shr16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4) IFX(X_OF) { CMPSw_U12(s2, 1); // if s2==1 Bcond(cNE, 4+2*4); - LSRw(s4, s1, 7); + LSRw(s4, s1, 15); BFIw(xFlags, s4, F_OF, 1); } LSRw_REG(s1, s1, s2); @@ -1354,4 +1354,4 @@ void emit_shld16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s5, int s3, IFX(X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } -} \ No newline at end of file +} |