[DYNACACHE] More work on preparing internal reloc, plus fix non-trace build

12 files changed, 59 insertions, 47 deletions

diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c
index f6d16ee6..fa476e6d 100644
--- a/src/dynarec/arm64/dynarec_arm64_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_0f.c
@@ -54,9 +54,6 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(s0);

     MAYUSE(j64);

     MAYUSE(cacheupd);

-    #if STEP > 1

-    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };

-    #endif

 

     switch(opcode) {

 

@@ -2739,7 +2736,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             q1 = fpu_get_scratch(dyn, ninst);

             GETEM(q0, 0);

             GETGD;

-            TABLE64(x1, (uintptr_t)&mask_shift8);

+            TABLE64C(x1, const_8b_m7_m6_m5_m4_m3_m2_m1_0);

             VLDR64_U12(v0, x1, 0);     // load shift

             MOVI_8(v1, 0x80);   // load mask

             VAND(q1, v1, q0);

diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c
index 937e0872..68061e6b 100644
--- a/src/dynarec/arm64/dynarec_arm64_660f.c
+++ b/src/dynarec/arm64/dynarec_arm64_660f.c
@@ -46,9 +46,6 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     MAYUSE(eb2);

     MAYUSE(j64);

     #if STEP > 1

-    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };

-    static const int8_t mask_string8[] = { 7, 6, 5, 4, 3, 2, 1, 0 };

-    static const int8_t mask_string16[] = { 15, 14, 13, 12, 11, 10, 9, 8 };

     static const int8_t round_round[] = { 0, 2, 1, 3};

     #endif

 

@@ -1311,7 +1308,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                                 LSRw_IMM(x1, x1, 8);

                                 VDUPQB(q1, x1); // load the high 8bits of the mask

                                 VEXTQ_8(q0, q0, q1, 8); // low and hig bits mask

-                                TABLE64(x2, (uintptr_t)&mask_string8);

+                                TABLE64C(x2, const_8b_7_6_5_4_3_2_1_0);

                                 VLDR64_U12(q1, x2, 0);     // load shift

                                 VDUPQ_64(q1, q1, 0);

                                 USHLQ_8(q0, q0, q1); // extract 1 bit

@@ -1321,7 +1318,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                                 break;

                             case 0b01:

                                 VDUPQH(q0, x1); // load the 8bits of the mask

-                                TABLE64(x2, (uintptr_t)&mask_string16);

+                                TABLE64C(x2, const_8b_15_14_13_12_11_10_9_8);

                                 VLDR64_U12(q1, x2, 0);     // load shift

                                 UXTL_8(q1, q1);     // extend mask to 16bits

                                 USHLQ_16(q0, q0, q1); // extract 1 bit

@@ -1353,7 +1350,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                             // transform that a mask in x1

                             q1 = fpu_get_scratch(dyn, ninst);

                             VSHL_8(q0, q0, 7);  // keep only bit 0x80

-                            TABLE64(x1, (uintptr_t)&mask_shift8);

+                            TABLE64C(x1, const_8b_m7_m6_m5_m4_m3_m2_m1_0);

                             VLDR64_U12(q1, x1, 0);     // load shift

                             USHL_8(q0, q0, q1); // shift

                             UADDLV_8(q0, q0);   // accumulate

@@ -1365,7 +1362,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                             q1 = fpu_get_scratch(dyn, ninst);

                             d0 = fpu_get_scratch(dyn, ninst);

                             VSHL_8(d0, q0, 7);  // keep only bit 0x80

-                            TABLE64(x1, (uintptr_t)&mask_shift8);

+                            TABLE64C(x1, const_8b_m7_m6_m5_m4_m3_m2_m1_0);

                             VLDR64_U12(q1, x1, 0);     // load shift

                             USHL_8(d0, d0, q1); // shift

                             UADDLV_8(d0, d0);   // accumulate

@@ -1516,7 +1513,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                                 LSRw_IMM(x1, x1, 8);

                                 VDUPQB(q1, x1); // load the high 8bits of the mask

                                 VEXTQ_8(q0, q0, q1, 8); // low and hig bits mask

-                                TABLE64(x2, (uintptr_t)&mask_string8);

+                                TABLE64C(x2, const_8b_7_6_5_4_3_2_1_0);

                                 VLDR64_U12(q1, x2, 0);     // load shift

                                 VDUPQ_64(q1, q1, 0);

                                 USHLQ_8(q0, q0, q1); // extract 1 bit

@@ -1526,7 +1523,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                                 break;

                             case 0b01:

                                 VDUPQH(q0, x1); // load the 8bits of the mask

-                                TABLE64(x2, (uintptr_t)&mask_string16);

+                                TABLE64C(x2, const_8b_15_14_13_12_11_10_9_8);

                                 VLDR64_U12(q1, x2, 0);     // load shift

                                 UXTL_8(q1, q1);     // extend mask to 16bits

                                 USHLQ_16(q0, q0, q1); // extract 1 bit

diff --git a/src/dynarec/arm64/dynarec_arm64_66f20f.c b/src/dynarec/arm64/dynarec_arm64_66f20f.c
index c5195088..36b65c47 100644
--- a/src/dynarec/arm64/dynarec_arm64_66f20f.c
+++ b/src/dynarec/arm64/dynarec_arm64_66f20f.c
@@ -45,12 +45,6 @@ uintptr_t dynarec64_66F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int
     MAYUSE(eb1);
     MAYUSE(eb2);
     MAYUSE(j64);
-    #if STEP > 1
-    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };
-    static const int8_t mask_string8[] = { 7, 6, 5, 4, 3, 2, 1, 0 };
-    static const int8_t mask_string16[] = { 15, 14, 13, 12, 11, 10, 9, 8 };
-    static const int8_t round_round[] = { 0, 2, 1, 3};
-    #endif
 
     switch(opcode) {
 
diff --git a/src/dynarec/arm64/dynarec_arm64_66f30f.c b/src/dynarec/arm64/dynarec_arm64_66f30f.c
index 35c3b9ff..07ff24b3 100644
--- a/src/dynarec/arm64/dynarec_arm64_66f30f.c
+++ b/src/dynarec/arm64/dynarec_arm64_66f30f.c
@@ -45,12 +45,6 @@ uintptr_t dynarec64_66F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int
     MAYUSE(eb1);
     MAYUSE(eb2);
     MAYUSE(j64);
-    #if STEP > 1
-    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };
-    static const int8_t mask_string8[] = { 7, 6, 5, 4, 3, 2, 1, 0 };
-    static const int8_t mask_string16[] = { 15, 14, 13, 12, 11, 10, 9, 8 };
-    static const int8_t round_round[] = { 0, 2, 1, 3};
-    #endif
 
     switch(opcode) {
         case 0xB8:
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_0f.c
index 00ecd917..dc3d07ae 100644
--- a/src/dynarec/arm64/dynarec_arm64_avx_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_avx_0f.c
@@ -54,9 +54,6 @@ uintptr_t dynarec64_AVX_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int
     MAYUSE(s0);
     MAYUSE(j64);
     MAYUSE(cacheupd);
-    #if STEP > 1
-    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };
-    #endif
 
     rex_t rex = vex.rex;
 
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c
index a0208890..6447eef4 100644
--- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c
+++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c
@@ -22,11 +22,6 @@
 #include "dynarec_arm64_functions.h"
 #include "../dynarec_helper.h"
 
-static const float addsubps[4] = {-1.f, 1.f, -1.f, 1.f};
-static const double addsubpd[2] = {-1., 1.};
-static const float subaddps[4] = {1.f, -1.f, 1.f, -1.f};
-static const double subaddpd[2] = {1., -1.};
-
 uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, vex_t vex, int* ok, int* need_epilog)
 {
     (void)ip; (void)need_epilog;
@@ -1587,7 +1582,7 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip
             INST_NAME("VFMADDSUB213PS/D Gx, Vx, Ex");
             nextop = F8;
             q0 = fpu_get_scratch(dyn, ninst);
-            TABLE64(x2, (rex.w)?((uintptr_t)&addsubpd):((uintptr_t)&addsubps));
+            TABLE64C(x2, rex.w?const_2d_m1_1:const_4f_m1_1_m1_1);
             VLDR128_U12(q0, x2, 0);
             q1 = fpu_get_scratch(dyn, ninst);
             for(int l=0; l<1+vex.l; ++l) {
@@ -1738,7 +1733,7 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip
             INST_NAME("VFMADDSUB231PS/D Gx, Vx, Ex");
             nextop = F8;
             q0 = fpu_get_scratch(dyn, ninst);
-            TABLE64(x2, (rex.w)?((uintptr_t)&addsubpd):((uintptr_t)&addsubps));
+            TABLE64C(x2, rex.w?const_2d_m1_1:const_4f_m1_1_m1_1);
             VLDR128_U12(q0, x2, 0);
             for(int l=0; l<1+vex.l; ++l) {
                 if(!l) { GETGX_VXEX(v0, v2, v1, 0); if(v0==v2 || v0==v1) q1 = fpu_get_scratch(dyn, ninst); } else { GETGY_VYEY(v0, v2, v1); }
@@ -1761,7 +1756,7 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip
             INST_NAME("VFMSUBADD231PS/D Gx, Vx, Ex");
             nextop = F8;
             q0 = fpu_get_scratch(dyn, ninst);
-            TABLE64(x2, (rex.w)?((uintptr_t)&subaddpd):((uintptr_t)&subaddps));
+            TABLE64(x2, rex.w?const_2d_1_m1:const_4f_1_m1_1_m1);
             VLDR128_U12(q0, x2, 0);
             for(int l=0; l<1+vex.l; ++l) {
                 if(!l) { GETGX_VXEX(v0, v2, v1, 0); if(v0==v2 || v0==v1) q1 = fpu_get_scratch(dyn, ninst); } else { GETGY_VYEY(v0, v2, v1); }
diff --git a/src/dynarec/arm64/dynarec_arm64_consts.c b/src/dynarec/arm64/dynarec_arm64_consts.c
index 0bcfc22a..f412099f 100644
--- a/src/dynarec/arm64/dynarec_arm64_consts.c
+++ b/src/dynarec/arm64/dynarec_arm64_consts.c
@@ -15,12 +15,28 @@
 #include "my_cpuid.h"
 #include "freq.h"
 #include "debug.h"
+#include "custommem.h"
 #include "dynarec_arm64_functions.h"
 #include "emu/x64shaext.h"
 #include "emu/x87emu_private.h"
 #include "emu/x64compstrings.h"
 #include "x64test.h"
 
+static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };
+static const int8_t mask_string8[] = { 7, 6, 5, 4, 3, 2, 1, 0 };
+static const int8_t mask_string16[] = { 15, 14, 13, 12, 11, 10, 9, 8 };
+static const float addsubps[4] = {-1.f, 1.f, -1.f, 1.f};
+static const double addsubpd[2] = {-1., 1.};
+static const float subaddps[4] = {1.f, -1.f, 1.f, -1.f};
+static const double subaddpd[2] = {1., -1.};
+
+void arm64_epilog(void);
+void* arm64_next(x64emu_t* emu, uintptr_t addr);
+
+#ifndef HAVE_TRACE
+void PrintTrace() {}
+#endif
+
 uintptr_t getConst(arm64_consts_t which)
 {
     switch(which) {
@@ -106,6 +122,17 @@ uintptr_t getConst(arm64_consts_t which)
         case const_sse42_compare_string_implicit_len: return (uintptr_t)sse42_compare_string_implicit_len;
         case const_x64test_step: return (uintptr_t)x64test_step;
         case const_printtrace: return (uintptr_t)PrintTrace;
+        case const_epilog: return (uintptr_t)arm64_epilog;
+        case const_jmptbl32: return getJumpTable32();
+        case const_jmptbl48: return getJumpTable48();
+        case const_jmptbl64: return getJumpTable64();
+        case const_8b_m7_m6_m5_m4_m3_m2_m1_0: return (uintptr_t)&mask_shift8;
+        case const_8b_7_6_5_4_3_2_1_0: return (uintptr_t)&mask_string8;
+        case const_8b_15_14_13_12_11_10_9_8: return (uintptr_t)&mask_string16;
+        case const_4f_m1_1_m1_1: return (uintptr_t)&addsubps;
+        case const_4f_1_m1_1_m1: return (uintptr_t)&subaddps;
+        case const_2d_m1_1: return (uintptr_t)&addsubpd;
+        case const_2d_1_m1: return (uintptr_t)&subaddpd;
 
         case const_last: dynarec_log(LOG_NONE, "Warning, const last used\n");
             return 0;
diff --git a/src/dynarec/arm64/dynarec_arm64_consts.h b/src/dynarec/arm64/dynarec_arm64_consts.h
index 6357791d..2c14640b 100644
--- a/src/dynarec/arm64/dynarec_arm64_consts.h
+++ b/src/dynarec/arm64/dynarec_arm64_consts.h
@@ -84,6 +84,17 @@ typedef enum arm64_consts_s {
     const_sse42_compare_string_implicit_len,
     const_x64test_step,
     const_printtrace,
+    const_epilog,
+    const_jmptbl32,
+    const_jmptbl48,
+    const_jmptbl64,
+    const_8b_m7_m6_m5_m4_m3_m2_m1_0,
+    const_8b_7_6_5_4_3_2_1_0,
+    const_8b_15_14_13_12_11_10_9_8,
+    const_4f_m1_1_m1_1,
+    const_2d_m1_1,
+    const_4f_1_m1_1_m1,
+    const_2d_1_m1,
 
     const_last
 } arm64_consts_t;
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c
index 38a1eee4..12274e44 100644
--- a/src/dynarec/arm64/dynarec_arm64_helper.c
+++ b/src/dynarec/arm64/dynarec_arm64_helper.c
@@ -560,7 +560,7 @@ void jump_to_epilog(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst)
         GETIP_(ip);
     }
     NOTEST(x2);
-    TABLE64(x2, (uintptr_t)arm64_epilog);
+    TABLE64C(x2, const_epilog);
     SMEND();
     BR(x2);
 }
@@ -575,8 +575,7 @@ static int indirect_lookup(dynarec_arm_t* dyn, int ninst, int is32bits, int s1,
         LSRx_IMM(s1, xRIP, 48);
         CBNZw(s1, (intptr_t)dyn->jmp_next - (intptr_t)dyn->block);
         // load table
-        uintptr_t tbl = getJumpTable48(); // this is a static value, so will be a low address
-        MOV64x(s2, tbl);
+        MOV64x(s2, getConst(const_jmptbl48));    // this is a static value, so will be a low address
         #ifdef JMPTABL_SHIFT4
         UBFXx(s1, xRIP, JMPTABL_START3, JMPTABL_SHIFT3);
         LDRx_REG_LSL3(s2, s2, s1);
@@ -588,8 +587,7 @@ static int indirect_lookup(dynarec_arm_t* dyn, int ninst, int is32bits, int s1,
         // LSRx_IMM(s1, xRIP, 32);
         // CBNZw(s1, (intptr_t)dyn->jmp_next - (intptr_t)dyn->block);
         // load table
-        uintptr_t tbl = getJumpTable32(); // this will not be a low address
-        TABLE64(s2, tbl);
+        TABLE64C(s2, const_jmptbl32);
         #ifdef JMPTABL_SHIFT4
         UBFXx(s1, xRIP, JMPTABL_START2, JMPTABL_SHIFT2);
         LDRx_REG_LSL3(s2, s2, s1);
@@ -624,7 +622,7 @@ void jump_to_next(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst, int is32
         NOTEST(x2);
         uintptr_t p = getJumpTableAddress64(ip);
         MAYUSE(p);
-        MOV64x(x3, p);
+        TABLE64(x3, p);
         GETIP_(ip);
         LDRx_U12(x2, x3, 0);
         dest = x2;
@@ -752,7 +750,7 @@ void iret_to_epilog(dynarec_arm_t* dyn, uintptr_t ip, int ninst, int is32bits, i
     MOVx_REG(xRSP, x3);
     MARKSEG;
     // Ret....
-    MOV64x(x2, (uintptr_t)arm64_epilog);  // epilog on purpose, CS might have changed!
+    MOV64x(x2, getConst(const_epilog));  // epilog on purpose, CS might have changed!
     BR(x2);
     CLEARIP();
 }
@@ -780,7 +778,7 @@ void call_c(dynarec_arm_t* dyn, int ninst, arm64_consts_t fnc, int reg, int ret,
     #ifdef _WIN32
     LDRx_U12(xR8, xEmu, offsetof(x64emu_t, win64_teb));
     #endif
-    TABLE64(reg, getConst(fnc));
+    TABLE64C(reg, fnc);
     BLR(reg);
     if(ret>=0) {
         MOVx_REG(ret, xEmu);
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h
index b270343e..9f557fd0 100644
--- a/src/dynarec/arm64/dynarec_arm64_helper.h
+++ b/src/dynarec/arm64/dynarec_arm64_helper.h
@@ -1211,6 +1211,9 @@
 #ifndef FTABLE64
 #define FTABLE64(A, V)
 #endif
+#ifndef TABLE64C
+#define TABLE64C(A, V)
+#endif
 
 #define ARCH_INIT()      \
     SMSTART();           \
@@ -1256,9 +1259,6 @@
 
 #define MODREG  ((nextop&0xC0)==0xC0)
 
-void arm64_epilog(void);
-void* arm64_next(x64emu_t* emu, uintptr_t addr);
-
 #ifndef STEPNAME
 #define STEPNAME3(N,M) N##M
 #define STEPNAME2(N,M) STEPNAME3(N,M)
diff --git a/src/dynarec/arm64/dynarec_arm64_pass2.h b/src/dynarec/arm64/dynarec_arm64_pass2.h
index 6fcb5b50..02f596a9 100644
--- a/src/dynarec/arm64/dynarec_arm64_pass2.h
+++ b/src/dynarec/arm64/dynarec_arm64_pass2.h
@@ -16,6 +16,7 @@
 #define INST_EPILOG dyn->insts[ninst].epilog = dyn->native_size; 
 #define INST_NAME(name) 
 #define TABLE64(A, V)   {Table64(dyn, (V), 2); EMIT(0);}
+#define TABLE64C(A, V)  {Table64(dyn, getConst(V), 2); EMIT(0);}
 #define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; Table64(dyn, v.q, 2); EMIT(0);}
 #define CALLRET_RET()   do {dyn->callrets[dyn->callret_size].type = 0; dyn->callrets[dyn->callret_size++].offs = dyn->native_size; EMIT(ARCH_NOP); } while(0)
 #define CALLRET_LOOP()   do {dyn->callrets[dyn->callret_size].type = 1; dyn->callrets[dyn->callret_size++].offs = dyn->native_size; EMIT(ARCH_NOP); } while(0)
\ No newline at end of file
diff --git a/src/dynarec/arm64/dynarec_arm64_pass3.h b/src/dynarec/arm64/dynarec_arm64_pass3.h
index ea66300d..73f0babf 100644
--- a/src/dynarec/arm64/dynarec_arm64_pass3.h
+++ b/src/dynarec/arm64/dynarec_arm64_pass3.h
@@ -25,6 +25,7 @@
 #define INST_EPILOG
 #define INST_NAME(name) inst_name_pass3(dyn, ninst, name, rex)
 #define TABLE64(A, V)   {int val64offset = Table64(dyn, (V), 3); MESSAGE(LOG_DUMP, "  Table64: 0x%lx\n", (V)); LDRx_literal(A, val64offset);}
+#define TABLE64C(A, V)  {int val64offset = Table64(dyn, getConst(V), 3); MESSAGE(LOG_DUMP, "  Table64: 0x%lx\n", (V)); LDRx_literal(A, val64offset);}
 #define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; int val64offset = Table64(dyn, v.q, 3); MESSAGE(LOG_DUMP, "  FTable64: %g\n", v.d); VLDR64_literal(A, val64offset);}
 #define CALLRET_RET()   do {dyn->callrets[dyn->callret_size].type = 0; dyn->callrets[dyn->callret_size++].offs = dyn->native_size; EMIT(ARCH_NOP); } while(0)
 #define CALLRET_LOOP()   do {dyn->callrets[dyn->callret_size].type = 1; dyn->callrets[dyn->callret_size++].offs = dyn->native_size; EMIT(ARCH_NOP); } while(0)