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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-03-06 20:02:55 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-03-06 20:03:08 +0100 |
| commit | 7ba0e7a0558e906d18d02ae1ea1fdc0218206024 (patch) | |
| tree | 48d77473c5ec416b5ee9bb4a9fbb7fef252d8c23 /docs/box64.pod | |
| parent | eb039c0449641264122374a5cb0ea6cc6b47f625 (diff) | |
| download | box64-7ba0e7a0558e906d18d02ae1ea1fdc0218206024.tar.gz box64-7ba0e7a0558e906d18d02ae1ea1fdc0218206024.zip | |
[DOC] Fixed default for strongmem in docs
Diffstat (limited to 'docs/box64.pod')
| -rw-r--r-- | docs/box64.pod | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/box64.pod b/docs/box64.pod index 598e5835..5bd8c5db 100644 --- a/docs/box64.pod +++ b/docs/box64.pod @@ -288,8 +288,8 @@ Behaviour of flags emulation on CALL/RET opcodes. Enable the emulation of x86 strong memory model. - * 0 : Do not try anything special. - * 1 : Enable some memory barriers when writing to memory to emulate the x86 strong memory model in a limited way. [Default] + * 0 : Do not try anything special. [Default] + * 1 : Enable some memory barriers when writing to memory to emulate the x86 strong memory model in a limited way. * 2 : All in 1, plus memory barriers on SIMD instructions. * 3 : All in 2, plus more memory barriers on a regular basis. |