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authorptitSeb <sebastien.chev@gmail.com>2022-03-29 12:01:40 +0200
committerptitSeb <sebastien.chev@gmail.com>2022-03-29 12:01:40 +0200
commit0a8bbe93a52ce4d454e0eb8ee6c71384e0b5fb94 (patch)
treee1365bcff9cb6cdfa696e2962e356e1878a0d206 /src/dynarec
parent1beba3e27a3bed8add918cd7eac896428b629b11 (diff)
downloadbox64-0a8bbe93a52ce4d454e0eb8ee6c71384e0b5fb94.tar.gz
box64-0a8bbe93a52ce4d454e0eb8ee6c71384e0b5fb94.zip
Added 66 0F 38 30..35 opcodes ([DYNAREC] too) (for #260)
Diffstat (limited to 'src/dynarec')
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_660f.c47
1 files changed, 47 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c
index 39143bf9..aa8a724a 100755
--- a/src/dynarec/arm64/dynarec_arm64_660f.c
+++ b/src/dynarec/arm64/dynarec_arm64_660f.c
@@ -395,6 +395,53 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     SXTL_32(q0, q1);     // 32bits->64bits

                     break;

 

+                case 0x30:

+                    INST_NAME("PMOVZXBW Gx, Ex");  // SSE4 opcode!

+                    nextop = F8;

+                    GETEX(q1, 0);

+                    GETGX_empty(q0);

+                    UXTL_8(q0, q1);     // 8bits->16bits

+                    break;

+                case 0x31:

+                    INST_NAME("PMOVZXBD Gx, Ex");  // SSE4 opcode!

+                    nextop = F8;

+                    GETEX(q1, 0);

+                    GETGX_empty(q0);

+                    UXTL_8(q0, q1);     // 8bits->16bits

+                    UXTL_16(q0, q0);    //16bits->32bits

+                    break;

+                case 0x32:

+                    INST_NAME("PMOVZXBQ Gx, Ex");  // SSE4 opcode!

+                    nextop = F8;

+                    GETEX(q1, 0);

+                    GETGX_empty(q0);

+                    UXTL_8(q0, q1);     // 8bits->16bits

+                    UXTL_16(q0, q0);    //16bits->32bits

+                    UXTL_32(q0, q0);    //32bits->64bits

+                    break;

+                case 0x33:

+                    INST_NAME("PMOVZXWD Gx, Ex");  // SSE4 opcode!

+                    nextop = F8;

+                    GETEX(q1, 0);

+                    GETGX_empty(q0);

+                    UXTL_16(q0, q1);     // 16bits->32bits

+                    break;

+                case 0x34:

+                    INST_NAME("PMOVZXWQ Gx, Ex");  // SSE4 opcode!

+                    nextop = F8;

+                    GETEX(q1, 0);

+                    GETGX_empty(q0);

+                    UXTL_16(q0, q1);     // 16bits->32bits

+                    UXTL_32(q0, q1);     // 32bits->64bits

+                    break;

+                case 0x35:

+                    INST_NAME("PMOVZXDQ Gx, Ex");  // SSE4 opcode!

+                    nextop = F8;

+                    GETEX(q1, 0);

+                    GETGX_empty(q0);

+                    UXTL_32(q0, q1);     // 32bits->64bits

+                    break;

+

                 case 0x39:

                     INST_NAME("PMINSD Gx, Ex");  // SSE4 opcode!

                     nextop = F8;