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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-04-17 14:40:19 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-04-17 14:40:19 +0200 |
| commit | 18320e19bc0a7f4cfd99c29088395021ceee0051 (patch) | |
| tree | 01a2b1869f9ae62ca0b4c3cc7353bc0ef3cbe8d3 /src/dynarec | |
| parent | 248cd2e749dcc5931113a405e232e9a90c130089 (diff) | |
| download | box64-18320e19bc0a7f4cfd99c29088395021ceee0051.tar.gz box64-18320e19bc0a7f4cfd99c29088395021ceee0051.zip | |
Added 91..96 opcode and fixe REX.B 99 one ([DYNAREC] too)
Diffstat (limited to 'src/dynarec')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_00.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/dynarec/dynarec_arm64_00.c b/src/dynarec/dynarec_arm64_00.c index 98ccde9f..c8f4f4f1 100755 --- a/src/dynarec/dynarec_arm64_00.c +++ b/src/dynarec/dynarec_arm64_00.c @@ -981,7 +981,22 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0x90: - INST_NAME("NOP"); + case 0x91: + case 0x92: + case 0x93: + case 0x94: + case 0x95: + case 0x96: + case 0x97: + gd = xRAX+(opcode&0x07)+(rex.b<<3); + if(gd==xRAX) { + INST_NAME("NOP"); + } else { + INST_NAME("XCHG EAX, Reg"); + MOVxw_REG(x2, xRAX); + MOVxw_REG(xRAX, gd); + MOVxw_REG(gd, x2); + } break; case 0x98: |