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| author | josch <j.schauer@email.de> | 2023-03-26 08:59:00 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-03-26 09:59:00 +0200 |
| commit | 2ea036e02c3fe1374d32c23f795879623773a5ef (patch) | |
| tree | d6e66a89f5d54d11875a3a65b41356694442f70f /src/dynarec | |
| parent | f58ac3e9bf15251d902f22abea9685e7cbe55b2b (diff) | |
| download | box64-2ea036e02c3fe1374d32c23f795879623773a5ef.tar.gz box64-2ea036e02c3fe1374d32c23f795879623773a5ef.zip | |
fix some spelling mistakes (#640)
Diffstat (limited to 'src/dynarec')
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_00.c | 2 | ||||
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_functions.h | 4 | ||||
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_helper.c | 4 | ||||
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_pass3.h | 2 | ||||
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_private.h | 10 | ||||
| -rwxr-xr-x | src/dynarec/dynarec.c | 4 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_native.c | 4 | ||||
| -rw-r--r-- | src/dynarec/dynarec_native_functions.h | 4 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_00.c | 2 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_functions.h | 4 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.c | 4 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_pass3.h | 2 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_private.h | 10 |
13 files changed, 28 insertions, 28 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index 24eddde4..2118580a 100755 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -1682,7 +1682,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("RET"); // SETFLAGS(X_ALL, SF_SET); // Hack, set all flags (to an unknown state...) if(box64_dynarec_safeflags) { - READFLAGS(X_PEND); // so instead, force the defered flags, so it's not too slow, and flags are not lost + READFLAGS(X_PEND); // so instead, force the deferred flags, so it's not too slow, and flags are not lost } BARRIER(BARRIER_FLOAT); ret_to_epilog(dyn, ninst); diff --git a/src/dynarec/arm64/dynarec_arm64_functions.h b/src/dynarec/arm64/dynarec_arm64_functions.h index 4c01deb9..7fd12627 100755 --- a/src/dynarec/arm64/dynarec_arm64_functions.h +++ b/src/dynarec/arm64/dynarec_arm64_functions.h @@ -32,7 +32,7 @@ void neoncache_promote_double(dynarec_arm_t* dyn, int ninst, int a); // Combine and propagate if needed (pass 1 only) int neoncache_combine_st(dynarec_arm_t* dyn, int ninst, int a, int b); // with stack current dyn->n_stack* -// FPU Cache transformation (for loops) // Specific, need to be writen par backend +// FPU Cache transformation (for loops) // Specific, need to be written par backend int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst); // Undo the changes of a neoncache to get the status before the instruction @@ -43,4 +43,4 @@ int getedparity(dynarec_native_t* dyn, int ninst, uintptr_t addr, uint8_t nextop const char* getCacheName(int t, int n); -#endif //__DYNAREC_ARM_FUNCTIONS_H__ \ No newline at end of file +#endif //__DYNAREC_ARM_FUNCTIONS_H__ diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c index 8eb41e45..69e9bcf2 100755 --- a/src/dynarec/arm64/dynarec_arm64_helper.c +++ b/src/dynarec/arm64/dynarec_arm64_helper.c @@ -1437,7 +1437,7 @@ static void swapCache(dynarec_arm_t* dyn, int ninst, int i, int j, neoncache_t * } // SWAP neon_cache_t tmp; - MESSAGE(LOG_DUMP, "\t - Swaping %d <-> %d\n", i, j); + MESSAGE(LOG_DUMP, "\t - Swapping %d <-> %d\n", i, j); // There is no VSWP in Arm64 NEON to swap 2 register contents! // so use a scratch... #define SCRATCH 31 @@ -1827,7 +1827,7 @@ void fpu_reset_cache(dynarec_arm_t* dyn, int ninst, int reset_n) #endif } -// propagate ST stack state, especial stack pop that are defered +// propagate ST stack state, especial stack pop that are deferred void fpu_propagate_stack(dynarec_arm_t* dyn, int ninst) { if(dyn->n.stack_pop) { diff --git a/src/dynarec/arm64/dynarec_arm64_pass3.h b/src/dynarec/arm64/dynarec_arm64_pass3.h index 0f285a60..a83d6d0a 100755 --- a/src/dynarec/arm64/dynarec_arm64_pass3.h +++ b/src/dynarec/arm64/dynarec_arm64_pass3.h @@ -19,7 +19,7 @@ #define INST_NAME(name) \ if(box64_dynarec_dump) {\ printf_x64_instruction(my_context->dec, &dyn->insts[ninst].x64, name); \ - dynarec_log(LOG_NONE, "%s%p: %d emited opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, sm=%d/%d", \ + dynarec_log(LOG_NONE, "%s%p: %d emitted opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, sm=%d/%d", \ (box64_dynarec_dump>1)?"\e[32m":"", \ (void*)(dyn->native_start+dyn->insts[ninst].address), \ dyn->insts[ninst].size/4, \ diff --git a/src/dynarec/arm64/dynarec_arm64_private.h b/src/dynarec/arm64/dynarec_arm64_private.h index dcf78084..c966f9b3 100755 --- a/src/dynarec/arm64/dynarec_arm64_private.h +++ b/src/dynarec/arm64/dynarec_arm64_private.h @@ -57,15 +57,15 @@ typedef struct neoncache_s { typedef struct flagcache_s { int pending; // is there a pending flags here, or to check? - int dfnone; // if defered flags is already set to df_none + int dfnone; // if deferred flags is already set to df_none } flagcache_t; typedef struct instruction_arm64_s { instruction_x64_t x64; - uintptr_t address; // (start) address of the arm emited instruction + uintptr_t address; // (start) address of the arm emitted instruction uintptr_t epilog; // epilog of current instruction (can be start of next, or barrier stuff) - int size; // size of the arm emited instruction - int size2; // size of the arm emited instrucion after pass2 + int size; // size of the arm emitted instruction + int size2; // size of the arm emitted instrucion after pass2 int pred_sz; // size of predecessor list int *pred; // predecessor array uintptr_t mark, mark2, mark3; @@ -87,7 +87,7 @@ typedef struct dynarec_arm_s { int32_t cap; uintptr_t start; // start of the block uint32_t isize; // size in byte of x64 instructions included - void* block; // memory pointer where next instruction is emited + void* block; // memory pointer where next instruction is emitted uintptr_t native_start; // start of the arm code size_t native_size; // size of emitted arm code uintptr_t last_ip; // last set IP in RIP (or NULL if unclean state) TODO: move to a cache something diff --git a/src/dynarec/dynarec.c b/src/dynarec/dynarec.c index 24d1d1b3..0b3e1690 100755 --- a/src/dynarec/dynarec.c +++ b/src/dynarec/dynarec.c @@ -115,7 +115,7 @@ void DynaCall(x64emu_t* emu, uintptr_t addr) if(!block || !block->block || !block->done) { // no block, of block doesn't have DynaRec content (yet, temp is not null) // Use interpreter (should use single instruction step...) - dynarec_log(LOG_DEBUG, "%04d|Calling Interpretor @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu); + dynarec_log(LOG_DEBUG, "%04d|Calling Interpreter @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu); Run(emu, 1); } else { dynarec_log(LOG_DEBUG, "%04d|Calling DynaRec Block @%p (%p) of %d x64 instructions emu=%p\n", GetTID(), (void*)R_RIP, block->block, block->isize ,emu); @@ -190,7 +190,7 @@ int DynaRun(x64emu_t* emu) if(!block || !block->block || !block->done) { // no block, of block doesn't have DynaRec content (yet, temp is not null) // Use interpreter (should use single instruction step...) - dynarec_log(LOG_DEBUG, "%04d|Running Interpretor @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu); + dynarec_log(LOG_DEBUG, "%04d|Running Interpreter @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu); Run(emu, 1); } else { dynarec_log(LOG_DEBUG, "%04d|Running DynaRec Block @%p (%p) of %d x64 insts emu=%p\n", GetTID(), (void*)R_RIP, block->block, block->isize, emu); diff --git a/src/dynarec/dynarec_native.c b/src/dynarec/dynarec_native.c index d07588ec..c57b7d64 100755 --- a/src/dynarec/dynarec_native.c +++ b/src/dynarec/dynarec_native.c @@ -594,13 +594,13 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) { block->hash = X31_hash_code(block->x64_addr, block->x64_size); // Check if something changed, to abbort if it as if((block->hash != hash)) { - dynarec_log(LOG_DEBUG, "Warning, a block changed while beeing processed hash(%p:%ld)=%x/%x\n", block->x64_addr, block->x64_size, block->hash, hash); + dynarec_log(LOG_DEBUG, "Warning, a block changed while being processed hash(%p:%ld)=%x/%x\n", block->x64_addr, block->x64_size, block->hash, hash); AddHotPage(addr); CancelBlock64(0); return NULL; } if(!isprotectedDB(addr, end-addr)) { - dynarec_log(LOG_DEBUG, "Warning, block unprotected while beeing processed %p:%ld, cancelling\n", block->x64_addr, block->x64_size); + dynarec_log(LOG_DEBUG, "Warning, block unprotected while being processed %p:%ld, cancelling\n", block->x64_addr, block->x64_size); AddHotPage(addr); block->need_test = 1; //protectDB(addr, end-addr); diff --git a/src/dynarec/dynarec_native_functions.h b/src/dynarec/dynarec_native_functions.h index b16fa20b..2733cd5a 100644 --- a/src/dynarec/dynarec_native_functions.h +++ b/src/dynarec/dynarec_native_functions.h @@ -46,7 +46,7 @@ void native_clflush(x64emu_t* emu, void* p); void native_ud(x64emu_t* emu); void native_priv(x64emu_t* emu); -// Caches transformation (for loops) // Specific, need to be writen par backend +// Caches transformation (for loops) // Specific, need to be written par backend int CacheNeedsTransform(dynarec_native_t* dyn, int i1); // predecessor access @@ -61,4 +61,4 @@ int isNativeCall(dynarec_native_t* dyn, uintptr_t addr, uintptr_t* calladdress, ADDITIONNAL_DEFINITION() -#endif //__DYNAREC_NATIVE_FUNCTIONS_H__ \ No newline at end of file +#endif //__DYNAREC_NATIVE_FUNCTIONS_H__ diff --git a/src/dynarec/rv64/dynarec_rv64_00.c b/src/dynarec/rv64/dynarec_rv64_00.c index 0305131f..4c7d0247 100644 --- a/src/dynarec/rv64/dynarec_rv64_00.c +++ b/src/dynarec/rv64/dynarec_rv64_00.c @@ -1096,7 +1096,7 @@ uintptr_t dynarec64_00(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("RET"); // SETFLAGS(X_ALL, SF_SET); // Hack, set all flags (to an unknown state...) if(box64_dynarec_safeflags) { - READFLAGS(X_PEND); // so instead, force the defered flags, so it's not too slow, and flags are not lost + READFLAGS(X_PEND); // so instead, force the deferred flags, so it's not too slow, and flags are not lost } BARRIER(BARRIER_FLOAT); ret_to_epilog(dyn, ninst); diff --git a/src/dynarec/rv64/dynarec_rv64_functions.h b/src/dynarec/rv64/dynarec_rv64_functions.h index 5de69519..ce66827b 100644 --- a/src/dynarec/rv64/dynarec_rv64_functions.h +++ b/src/dynarec/rv64/dynarec_rv64_functions.h @@ -37,7 +37,7 @@ void extcache_promote_double(dynarec_rv64_t* dyn, int ninst, int a); // Combine and propagate if needed (pass 1 only) int extcache_combine_st(dynarec_rv64_t* dyn, int ninst, int a, int b); // with stack current dyn->n_stack* -// FPU Cache transformation (for loops) // Specific, need to be writen par backend +// FPU Cache transformation (for loops) // Specific, need to be written par backend int fpuCacheNeedsTransform(dynarec_rv64_t* dyn, int ninst); // Undo the changes of a extcache to get the status before the instruction @@ -45,4 +45,4 @@ void extcacheUnwind(extcache_t* cache); const char* getCacheName(int t, int n); -#endif //__DYNAREC_RV64_FUNCTIONS_H__ \ No newline at end of file +#endif //__DYNAREC_RV64_FUNCTIONS_H__ diff --git a/src/dynarec/rv64/dynarec_rv64_helper.c b/src/dynarec/rv64/dynarec_rv64_helper.c index 140bac68..f6d576ad 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.c +++ b/src/dynarec/rv64/dynarec_rv64_helper.c @@ -1334,7 +1334,7 @@ static void swapCache(dynarec_rv64_t* dyn, int ninst, int i, int j, extcache_t * } // SWAP ext_cache_t tmp; - MESSAGE(LOG_DUMP, "\t - Swaping %d <-> %d\n", i, j); + MESSAGE(LOG_DUMP, "\t - Swapping %d <-> %d\n", i, j); // There is no VSWP in Arm64 NEON to swap 2 register contents! // so use a scratch... #define SCRATCH 0 @@ -1771,7 +1771,7 @@ void fpu_reset_cache(dynarec_rv64_t* dyn, int ninst, int reset_n) #endif } -// propagate ST stack state, especial stack pop that are defered +// propagate ST stack state, especial stack pop that are deferred void fpu_propagate_stack(dynarec_rv64_t* dyn, int ninst) { if(dyn->e.stack_pop) { diff --git a/src/dynarec/rv64/dynarec_rv64_pass3.h b/src/dynarec/rv64/dynarec_rv64_pass3.h index 9c9fac54..1884a276 100644 --- a/src/dynarec/rv64/dynarec_rv64_pass3.h +++ b/src/dynarec/rv64/dynarec_rv64_pass3.h @@ -26,7 +26,7 @@ #define INST_NAME(name) \ if(box64_dynarec_dump) {\ printf_x64_instruction(my_context->dec, &dyn->insts[ninst].x64, name); \ - dynarec_log(LOG_NONE, "%s%p: %d emited opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, sm=%d/%d", \ + dynarec_log(LOG_NONE, "%s%p: %d emitted opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, sm=%d/%d", \ (box64_dynarec_dump>1)?"\e[32m":"", \ (void*)(dyn->native_start+dyn->insts[ninst].address), \ dyn->insts[ninst].size/4, \ diff --git a/src/dynarec/rv64/dynarec_rv64_private.h b/src/dynarec/rv64/dynarec_rv64_private.h index c00325e1..bf510c0b 100644 --- a/src/dynarec/rv64/dynarec_rv64_private.h +++ b/src/dynarec/rv64/dynarec_rv64_private.h @@ -58,15 +58,15 @@ typedef struct extcache_s { typedef struct flagcache_s { int pending; // is there a pending flags here, or to check? - int dfnone; // if defered flags is already set to df_none + int dfnone; // if deferred flags is already set to df_none } flagcache_t; typedef struct instruction_rv64_s { instruction_x64_t x64; - uintptr_t address; // (start) address of the arm emited instruction + uintptr_t address; // (start) address of the arm emitted instruction uintptr_t epilog; // epilog of current instruction (can be start of next, or barrier stuff) - int size; // size of the arm emited instruction - int size2; // size of the arm emited instrucion after pass2 + int size; // size of the arm emitted instruction + int size2; // size of the arm emitted instrucion after pass2 int pred_sz; // size of predecessor list int *pred; // predecessor array uintptr_t mark, mark2, mark3; @@ -88,7 +88,7 @@ typedef struct dynarec_rv64_s { int32_t cap; uintptr_t start; // start of the block uint32_t isize; // size in byte of x64 instructions included - void* block; // memory pointer where next instruction is emited + void* block; // memory pointer where next instruction is emitted uintptr_t native_start; // start of the arm code size_t native_size; // size of emitted arm code uintptr_t last_ip; // last set IP in RIP (or NULL if unclean state) TODO: move to a cache something |