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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-12-31 15:54:45 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-12-31 15:54:45 +0100 |
| commit | 3e0f2bfc4ae48228e1451d145cd4ac04cbf18be7 (patch) | |
| tree | 8a5362196a309285aadb21dc8b01509acc44795a /src/dynarec | |
| parent | 5e9e1faedc97194e46f3fb4b3665ec416ce7efbf (diff) | |
| download | box64-3e0f2bfc4ae48228e1451d145cd4ac04cbf18be7.tar.gz box64-3e0f2bfc4ae48228e1451d145cd4ac04cbf18be7.zip | |
Fixed some (nasty sometimes) warning
Diffstat (limited to 'src/dynarec')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.c | 6 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.h | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c index 671bdfe2..c9fd9b3f 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.c +++ b/src/dynarec/arm64/dynarec_arm64_helper.c @@ -57,7 +57,7 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u if((sib&0x7)==5) { int64_t tmp = F32S; if (sib_reg!=4) { - if(tmp && (!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256))) { + if(tmp && ((!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256)))) { MOV64x(scratch, tmp); ADDx_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); } else { @@ -212,7 +212,7 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t if((sib&0x7)==5) { int64_t tmp = F32S; if (sib_reg!=4) { - if(tmp && (!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256))) { + if(tmp && ((!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256)))) { MOV32w(scratch, tmp); ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); } else { @@ -348,7 +348,7 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if((sib&0x7)==5) { int64_t tmp = F32S; if (sib_reg!=4) { - if(tmp && (!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256))) { + if(tmp && ((!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256)))) { MOV64x(scratch, tmp); ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); } else { diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 310cd571..9f5c6c50 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -484,7 +484,7 @@ TSTw_mask(xFlags, 0b010110, 0); \ CNEGx(r, r, cNE) -#define ALIGNED_ATOMICxw ((fixedaddress && !(fixedaddress&((1<<(2+rex.w)-1)))) || box64_dynarec_aligned_atomics) +#define ALIGNED_ATOMICxw ((fixedaddress && !(fixedaddress&(((1<<(2+rex.w))-1)))) || box64_dynarec_aligned_atomics) #define ALIGNED_ATOMICH ((fixedaddress && !(fixedaddress&1)) || box64_dynarec_aligned_atomics) // CALL will use x7 for the call address. Return value can be put in ret (unless ret is -1) |