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| author | ptitSeb <sebastien.chev@gmail.com> | 2022-04-25 11:19:38 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2022-04-25 11:19:38 +0200 |
| commit | 5d93fc58b30e4d3bbf4e35a4da98e4d9310a2b3a (patch) | |
| tree | f0cfdd2e809d24023ecee64b890c5b2bd7287577 /src/dynarec | |
| parent | ab633484cd817ebee22b9432c0ac7ccececc1bd1 (diff) | |
| download | box64-5d93fc58b30e4d3bbf4e35a4da98e4d9310a2b3a.tar.gz box64-5d93fc58b30e4d3bbf4e35a4da98e4d9310a2b3a.zip | |
[DYNAREC] A small optim of FCOMI macro when OF, AF or SF are needed
Diffstat (limited to 'src/dynarec')
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_helper.h | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index ee4da8e7..3e09bb60 100755 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -469,9 +469,19 @@ // Generate FCOMI with s1 and s2 scratch regs (the VCMP is already done) #define FCOMI(s1, s2) \ - IFX(X_CF|X_PF|X_ZF|X_PEND) { \ - MOV32w(s2, 0b01000101); \ + IFX(X_OF|X_AF|X_SF|X_PEND) { \ + MOV32w(s2, 0b100011010101); \ BICw_REG(xFlags, xFlags, s2); \ + IFX(X_CF|X_PF|X_ZF|X_PEND) { \ + MOV32w(s2, 0b01000101); \ + } \ + } else { \ + IFX(X_CF|X_PF|X_ZF|X_PEND) { \ + MOV32w(s2, 0b01000101); \ + BICw_REG(xFlags, xFlags, s2); \ + } \ + } \ + IFX(X_CF|X_PF|X_ZF|X_PEND) { \ CSETw(s1, cMI); /* 1 if less than, 0 else */ \ /*s2 already set */ /* unordered */ \ CSELw(s1, s2, s1, cVS); \ @@ -481,15 +491,6 @@ ORRw_REG(xFlags, xFlags, s1); \ } \ SET_DFNONE(s1); \ - IFX(X_OF|X_PEND) { \ - BFCw(xFlags, F_OF, 1); \ - } \ - IFX(X_AF|X_PEND) { \ - BFCw(xFlags, F_AF, 1); \ - } \ - IFX(X_SF|X_PEND) { \ - BFCw(xFlags, F_SF, 1); \ - } \ #define STORE_REG(A) STRx_U12(x##A, xEmu, offsetof(x64emu_t, regs[_##A])) |