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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-02-06 18:21:37 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-02-06 18:21:37 +0100 |
| commit | 8d0cc15eb0d078e5ae457bca8b11a31c28a96e27 (patch) | |
| tree | 9be96d8a89b43b1342a8fba6a74a36dcb61bd12c /src/dynarec | |
| parent | ee2580a57fae19e1c47a1af03dcfb3edffe697b3 (diff) | |
| download | box64-8d0cc15eb0d078e5ae457bca8b11a31c28a96e27.tar.gz box64-8d0cc15eb0d078e5ae457bca8b11a31c28a96e27.zip | |
[ARM64_DYNAREC] Reworked, again, strongmem emulation
Diffstat (limited to 'src/dynarec')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_00.c | 5 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.h | 15 |
2 files changed, 15 insertions, 5 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index 6a5c5b7e..62604eec 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -2160,10 +2160,12 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin call_n(dyn, ninst, *(void**)(addr+8), tmp); addr+=8+8; } else { + WILLWRITE2(); GETIP(ip+1); // read the 0xCC STORE_XEMU_CALL(xRIP); ADDx_U12(x1, xEmu, (uint32_t)offsetof(x64emu_t, ip)); // setup addr as &emu->ip CALL_S(x64Int3, -1); + SMWRITE2(); LOAD_XEMU_CALL(xRIP); addr+=8+8; TABLE64(x3, addr); // expected return address @@ -2834,6 +2836,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } else { TABLE64(x2, addr); } + WILLWRITE2(); PUSH1(x2); MESSAGE(LOG_DUMP, "Native Call to %s (retn=%d)\n", GetNativeName(GetNativeFnc(dyn->insts[ninst].natcall-1)), dyn->insts[ninst].retn); SKIPTEST(x1); // disable test as this hack dos 2 instructions for 1 @@ -2850,6 +2853,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if((box64_log<2 && !cycle_log) && dyn->insts[ninst].natcall && tmp) { //GETIP(ip+3+8+8); // read the 0xCC call_n(dyn, ninst, *(void**)(dyn->insts[ninst].natcall+2+8), tmp); + SMWRITE2(); POP1(xRIP); // pop the return address dyn->last_ip = addr; } else { @@ -2857,6 +2861,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin STORE_XEMU_CALL(xRIP); ADDx_U12(x1, xEmu, (uint32_t)offsetof(x64emu_t, ip)); // setup addr as &emu->ip CALL_S(x64Int3, -1); + SMWRITE2(); LOAD_XEMU_CALL(xRIP); TABLE64(x3, dyn->insts[ninst].natcall); ADDx_U12(x3, x3, 2+8+8); diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 99894327..918b8b2a 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -33,15 +33,19 @@ #define PKip(a) *(uint8_t*)(ip+a) // Strong mem emulation helpers -#define SMREAD_MIN 2 +#define SMREAD_MIN 3 +#define SMWRITE2_MIN 1 #define SMFIRST_MIN 1 +#define SMSEQ_MIN 2 +#define SMSEQ_MAX 3 #if STEP == 0 // pass 0 will store is opcode write memory #define SMWRITE() dyn->insts[ninst].will_write = 1; dyn->smwrite = 1 #define SMREAD() #define SMREADLOCK(lock) #define SMMIGHTREAD() -#define SMWRITE2() if(box64_dynarec_strongmem>SMREAD_MIN) {SMWRITE();} +#define WILLWRITE2() if(box64_dynarec_strongmem>SMWRITE2_MIN) {WILLWRITE();} +#define SMWRITE2() if(box64_dynarec_strongmem>SMWRITE2_MIN) {SMWRITE();} #define SMWRITELOCK(lock) SMWRITE() #define WILLWRITELOCK(lock) #define WILLWRITE() @@ -60,11 +64,12 @@ // Opcode might read (depend on nextop) #define SMMIGHTREAD() if(!MODREG) {SMREAD();} // Opcode has wrote -#define SMWRITE() if((box64_dynarec_strongmem>=SMFIRST_MIN) && dyn->smwrite==0) {SMDMB();} dyn->smwrite=1 +#define SMWRITE() if((box64_dynarec_strongmem>=SMFIRST_MIN) && dyn->smwrite==0) {SMDMB();} if(box64_dynarec_strongmem>SMSEQ_MIN) {if(++dyn->smwrite>=SMSEQ_MAX) {SMDMB(); dyn->smwrite=1;}} else dyn->smwrite=1 // Opcode has wrote (strongmem>1 only) -#define SMWRITE2() if(box64_dynarec_strongmem>SMREAD_MIN) {SMWRITE();} +#define WILLWRITE2() if(box64_dynarec_strongmem>SMWRITE2_MIN) {WILLWRITE();} +#define SMWRITE2() if(box64_dynarec_strongmem>SMWRITE2_MIN) {SMWRITE();} // Opcode has wrote with option forced lock -#define SMWRITELOCK(lock) if(lock) {SMDMB();} else {SMWRITE();} +#define SMWRITELOCK(lock) if(lock) {SMDMB(); dyn->smwrite=1;} else {SMWRITE();} // Opcode has wrote with option forced lock #define WILLWRITELOCK(lock) if(lock) {DMB_ISH();} else {WILLWRITE();} // Opcode might have wrote (depend on nextop) |