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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-03-14 11:01:40 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-03-14 11:01:40 +0100 |
| commit | cd8bda7a29a2ef15d939890cacab02efb84e0158 (patch) | |
| tree | ee89bcc4a842c70582c5ac6736a1989309810bde /src/dynarec | |
| parent | 8115b4705109028650bdf0236b23a4991ddaaed2 (diff) | |
| download | box64-cd8bda7a29a2ef15d939890cacab02efb84e0158.tar.gz box64-cd8bda7a29a2ef15d939890cacab02efb84e0158.zip | |
Changed, again, RDTSC and Hardware counter, introducing auto calibration when hardware counter is too slow for modern standard (and removed BOX64_RDTSC env. var.)
Diffstat (limited to 'src/dynarec')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_0f.c | 6 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_0f.c | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index 0bb9dffc..8e8ec00e 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -98,6 +98,9 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } else { MRS_cntvct_el0(x1); } + if(box64_rdtsc_shift) { + LSLx(x1, x1, box64_rdtsc_shift); + } LSRx(xRDX, x1, 32); MOVw_REG(xRAX, x1); // wipe upper part MOVw_REG(xRCX, xZR); // IA32_TSC, 0 for now @@ -499,6 +502,9 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } else { MRS_cntvct_el0(x1); } + if(box64_rdtsc_shift) { + LSLx(x1, x1, box64_rdtsc_shift); + } LSRx(xRDX, x1, 32); MOVw_REG(xRAX, x1); // wipe upper part break; diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c index bfe29a2c..d19ecd4e 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_0f.c @@ -87,6 +87,9 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } else { CSRRS(x3, xZR, 0xC01); // RDTIME } + if(box64_rdtsc_shift) { + SRLI(x3, x3, box64_rdtsc_shift); + } SRLI(xRDX, x3, 32); AND(xRAX, x3, xMASK); // wipe upper part MV(xRCX, xZR); // IA32_TSC, 0 for now @@ -412,6 +415,9 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } else { CSRRS(x3, xZR, 0xC01); // RDTIME } + if(box64_rdtsc_shift) { + SRLI(x3, x3, box64_rdtsc_shift); + } SRLI(xRDX, x3, 32); AND(xRAX, x3, xMASK); // wipe upper part break; |