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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-01-29 09:59:18 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-01-29 09:59:18 +0100 |
| commit | ce296f0e32b857f92a207a6fa6d448787fe72ea4 (patch) | |
| tree | 7a38574165428ffa0b550e86dfadb827c3521103 /src/dynarec | |
| parent | 6d5c3489c9584dce29bbe90b50f2ce5db0786592 (diff) | |
| download | box64-ce296f0e32b857f92a207a6fa6d448787fe72ea4.tar.gz box64-ce296f0e32b857f92a207a6fa6d448787fe72ea4.zip | |
[ARM64_DYNAREC] Added 67 6B opcode
Diffstat (limited to 'src/dynarec')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_67.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_67.c b/src/dynarec/arm64/dynarec_arm64_67.c index bcc5907d..3c379e0c 100644 --- a/src/dynarec/arm64/dynarec_arm64_67.c +++ b/src/dynarec/arm64/dynarec_arm64_67.c @@ -691,6 +691,40 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } break; + case 0x6B: + INST_NAME("IMUL Gd, Ed, Ib"); + SETFLAGS(X_ALL, SF_PENDING); + nextop = F8; + GETGD; + GETED32(1); + i64 = F8S; + MOV64xw(x4, i64); + if(rex.w) { + // 64bits imul + UFLAG_IF { + SMULH(x3, ed, x4); + MULx(gd, ed, x4); + UFLAG_OP1(x3); + UFLAG_RES(gd); + UFLAG_DF(x3, d_imul64); + } else { + MULxw(gd, ed, x4); + } + } else { + // 32bits imul + UFLAG_IF { + SMULL(gd, ed, x4); + UFLAG_RES(gd); + LSRx(x3, gd, 32); + UFLAG_OP1(x3); + UFLAG_DF(x3, d_imul32); + MOVw_REG(gd, gd); + } else { + MULxw(gd, ed, x4); + } + } + break; + case 0x81: case 0x83: nextop = F8; |