diff options
| author | Yang Liu <liuyang22@iscas.ac.cn> | 2025-05-30 16:23:10 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-05-30 10:23:10 +0200 |
| commit | d29be5fd143cd75d1540df3a0891132c5d604a09 (patch) | |
| tree | 167fd51f93124fab1fd74f175d6945a1e30de8b7 /src/dynarec | |
| parent | 53bb00a769f3168a5663893981fccebecd7ff4d7 (diff) | |
| download | box64-d29be5fd143cd75d1540df3a0891132c5d604a09.tar.gz box64-d29be5fd143cd75d1540df3a0891132c5d604a09.zip | |
[WOW64] Added support for cosim (#2683)
Diffstat (limited to 'src/dynarec')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_00.c | 1 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.c | 6 |
2 files changed, 6 insertions, 1 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index 6feae03c..8557af3f 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -2652,7 +2652,6 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETIP(addr); STORE_XEMU_CALL(xRIP); MOV32w(x1, u8); - LDRx_U12(xR8, xEmu, offsetof(x64emu_t, win64_teb)); CALL_S(native_int, -1); LOAD_XEMU_CALL(xRIP); TABLE64(x3, addr); // expected return address diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c index a3c8f027..7f78e4de 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.c +++ b/src/dynarec/arm64/dynarec_arm64_helper.c @@ -782,6 +782,9 @@ void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int save STPx_S7_offset(xR8, xR9, xEmu, offsetof(x64emu_t, regs[_R8])); fpu_pushcache(dyn, ninst, savereg, 0); } + #ifdef _WIN32 + LDRx_U12(xR8, xEmu, offsetof(x64emu_t, win64_teb)); + #endif TABLE64(reg, (uintptr_t)fnc); BLR(reg); if(ret>=0) { @@ -831,6 +834,9 @@ void call_i(dynarec_arm_t* dyn, int ninst, void* fnc) STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags)); fpu_pushcache(dyn, ninst, x87pc, 0); + #ifdef _WIN32 + LDRx_U12(xR8, xEmu, offsetof(x64emu_t, win64_teb)); + #endif TABLE64(x87pc, (uintptr_t)fnc); BLR(x87pc); LDPx_S7_postindex(xEmu, x1, xSP, 16); |