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authorjosch <josch@mister-muffin.de>2024-07-10 10:06:02 +0100
committerGitHub <noreply@github.com>2024-07-10 11:06:02 +0200
commitdfc60e8bf1aa20144c6dde5a3b1017c46c44f2e0 (patch)
tree88bad28e7ec7de5733dcc0da9460786abfb93268 /src/dynarec
parent655e752c0765d32b10244324588db1c168d0d0c8 (diff)
downloadbox64-dfc60e8bf1aa20144c6dde5a3b1017c46c44f2e0.tar.gz
box64-dfc60e8bf1aa20144c6dde5a3b1017c46c44f2e0.zip
fix some spelling (#1668)
Diffstat (limited to 'src/dynarec')
-rw-r--r--src/dynarec/arm64/dynarec_arm64_00.c2
-rw-r--r--src/dynarec/arm64/dynarec_arm64_66.c2
-rw-r--r--src/dynarec/arm64/dynarec_arm64_d9.c2
-rw-r--r--src/dynarec/arm64/dynarec_arm64_functions.c4
-rw-r--r--src/dynarec/arm64/dynarec_arm64_functions.h2
-rw-r--r--src/dynarec/arm64/dynarec_arm64_helper.h28
-rw-r--r--src/dynarec/dynarec_native_functions.c2
-rw-r--r--src/dynarec/dynarec_native_functions.h2
-rw-r--r--src/dynarec/rv64/dynarec_rv64_00_2.c2
-rw-r--r--src/dynarec/rv64/dynarec_rv64_66.c2
10 files changed, 24 insertions, 24 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c
index cd279330..5a638072 100644
--- a/src/dynarec/arm64/dynarec_arm64_00.c
+++ b/src/dynarec/arm64/dynarec_arm64_00.c
@@ -1498,7 +1498,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             SET_DFNONE(x1);
             if(box64_wine) {    // should this be done all the time?
                 TBZ_NEXT(xFlags, F_TF);
-                // go to epilog, TF should trigger at end of next opcode, so using Interpretor only
+                // go to epilog, TF should trigger at end of next opcode, so using Interpreter only
                 jump_to_epilog(dyn, addr, 0, ninst);
             }
             break;
diff --git a/src/dynarec/arm64/dynarec_arm64_66.c b/src/dynarec/arm64/dynarec_arm64_66.c
index 12efb37b..0689651e 100644
--- a/src/dynarec/arm64/dynarec_arm64_66.c
+++ b/src/dynarec/arm64/dynarec_arm64_66.c
@@ -728,7 +728,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             SET_DFNONE(x1);

             if(box64_wine) {    // should this be done all the time?

                 TBZ_NEXT(xFlags, F_TF);

-                // go to epilog, TF should trigger at end of next opcode, so using Interpretor only

+                // go to epilog, TF should trigger at end of next opcode, so using Interpreter only

                 jump_to_epilog(dyn, addr, 0, ninst);

             }

             break;

diff --git a/src/dynarec/arm64/dynarec_arm64_d9.c b/src/dynarec/arm64/dynarec_arm64_d9.c
index 53c3ad6e..9c8610be 100644
--- a/src/dynarec/arm64/dynarec_arm64_d9.c
+++ b/src/dynarec/arm64/dynarec_arm64_d9.c
@@ -294,7 +294,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             CALL(native_ftan, -1);
             x87_unstackcount(dyn, ninst, x1, i1);
             if(PK(0)==0xdd && PK(1)==0xd8) {
-                MESSAGE(LOG_DUMP, "Optimized next DD D8 fstp st0, st0, not emiting 1\n");
+                MESSAGE(LOG_DUMP, "Optimized next DD D8 fstp st0, st0, not emitting 1\n");
                 u8 = F8;
                 u8 = F8;
             } else {
diff --git a/src/dynarec/arm64/dynarec_arm64_functions.c b/src/dynarec/arm64/dynarec_arm64_functions.c
index 8fd0929e..ee1104e9 100644
--- a/src/dynarec/arm64/dynarec_arm64_functions.c
+++ b/src/dynarec/arm64/dynarec_arm64_functions.c
@@ -598,7 +598,7 @@ void neoncacheUnwind(neoncache_t* cache)
 
 #define F8      *(uint8_t*)(addr++)
 #define F32S64  (uint64_t)(int64_t)*(int32_t*)(addr+=4, addr-4)
-// Get if ED will have the correct parity. Not emiting anything. Parity is 2 for DWORD or 3 for QWORD
+// Get if ED will have the correct parity. Not emitting anything. Parity is 2 for DWORD or 3 for QWORD
 int getedparity(dynarec_arm_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, int parity, int delta)
 {
     (void)dyn; (void)ninst;
@@ -794,4 +794,4 @@ void fpu_reset_ninst(dynarec_native_t* dyn, int ninst)
 int fpu_is_st_freed(dynarec_native_t* dyn, int ninst, int st)
 {
     return (dyn->n.tags&(0b11<<(st*2)))?1:0;
-}
\ No newline at end of file
+}
diff --git a/src/dynarec/arm64/dynarec_arm64_functions.h b/src/dynarec/arm64/dynarec_arm64_functions.h
index b6c95904..e87da74c 100644
--- a/src/dynarec/arm64/dynarec_arm64_functions.h
+++ b/src/dynarec/arm64/dynarec_arm64_functions.h
@@ -58,7 +58,7 @@ int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst);
 // Undo the changes of a neoncache to get the status before the instruction
 void neoncacheUnwind(neoncache_t* cache);
 
-// Get if ED will have the correct parity. Not emiting anything. Parity is 2 for DWORD or 3 for QWORD
+// Get if ED will have the correct parity. Not emitting anything. Parity is 2 for DWORD or 3 for QWORD
 int getedparity(dynarec_native_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, int parity, int delta);
 
 const char* getCacheName(int t, int n);
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h
index 769082c3..dbc3c29f 100644
--- a/src/dynarec/arm64/dynarec_arm64_helper.h
+++ b/src/dynarec/arm64/dynarec_arm64_helper.h
@@ -459,7 +459,7 @@
 #define GETVX_empty(a)                  \
     a = sse_get_reg_empty(dyn, ninst, x1, vex.v)
 
-// Get empty VX, and non-writen  EX
+// Get empty VX, and non-written  EX
 #define GETVX_empty_EX(vx, ex, D)           \
     GETEX_Y(ex, 0, D);                      \
     GETVX_empty(vx)
@@ -484,29 +484,29 @@
     b = ymm_get_reg(dyn, ninst, x1, vex.v, w2, gd, k1, k2); \
     a = ymm_get_reg_empty(dyn, ninst, x1, gd, vex.v, k1, k2)
 
-// Get empty GX, and non-writen VX and EX
+// Get empty GX, and non-written VX and EX
 #define GETGX_empty_VXEX(gx, vx, ex, D)     \
     GETVX(vx, 0);                           \
     GETEX_Y(ex, 0, D);                      \
     GETGX_empty(gx)
 
-// Get empty GX, and non-writen EX
+// Get empty GX, and non-written EX
 #define GETGX_empty_EX(gx, ex, D)           \
     GETEX_Y(ex, 0, D);                      \
     GETGX_empty(gx)
 
-// Get empty GX, and non-writen VX
+// Get empty GX, and non-written VX
 #define GETGX_empty_VX(gx, vx)              \
     GETVX(vx, 0);                           \
     GETGX_empty(gx)
 
-// Get EX and and non-writen VX and GX
+// Get EX and and non-written VX and GX
 #define GETGXVXEX(gx, vx, ex, D)            \
     GETVX(vx, 0);                           \
     GETEX_Y(ex, 1, D);                      \
     GETGX(gx, 0)
 
-// Get GX and and non-writen VX and EX
+// Get GX and and non-written VX and EX
 #define GETGX_VXEX(gx, vx, ex, D)            \
     GETVX(vx, 0);                           \
     GETEX_Y(ex, 0, D);                      \
@@ -517,7 +517,7 @@
     GETGX(gx, 0);                           \
     GETEX_empty_Y(ex, D);
 
-// Get empty GY, and non-writen VY and EY
+// Get empty GY, and non-written VY and EY
 #define GETGY_empty_VYEY(gy, vy, ey)                                                            \
     vy = ymm_get_reg(dyn, ninst, x1, vex.v, 0, gd, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1);    \
     if(MODREG)                                                                                  \
@@ -526,7 +526,7 @@
         VLDR128_U12(ey, ed, fixedaddress+16);                                                   \
     gy = ymm_get_reg_empty(dyn, ninst, x1, gd, vex.v, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1)
 
-// Get EY and non-writen VY and GY
+// Get EY and non-written VY and GY
 #define GETGYVYEY(gy, vy, ey)                                                                   \
     vy = ymm_get_reg(dyn, ninst, x1, vex.v, 0, gd, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1);    \
     if(MODREG)                                                                                  \
@@ -535,7 +535,7 @@
         VLDR128_U12(ey, ed, fixedaddress+16);                                                   \
     gy = ymm_get_reg(dyn, ninst, x1, gd, 0, vex.v, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1)
 
-// Get GY and non-writen VY and EY
+// Get GY and non-written VY and EY
 #define GETGY_VYEY(gy, vy, ey)                                                                  \
     vy = ymm_get_reg(dyn, ninst, x1, vex.v, 0, gd, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1);    \
     if(MODREG)                                                                                  \
@@ -544,14 +544,14 @@
         VLDR128_U12(ey, ed, fixedaddress+16);                                                   \
     gy = ymm_get_reg(dyn, ninst, x1, gd, 1, vex.v, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1)
 
-// Get empty EY and non-writen VY and GY
+// Get empty EY and non-written VY and GY
 #define GETGYVYEY_empty(gy, vy, ey)                                                             \
     vy = ymm_get_reg(dyn, ninst, x1, vex.v, 0, gd, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1);    \
     gy = ymm_get_reg(dyn, ninst, x1, gd, 0, vex.v, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1);    \
     if(MODREG)                                                                                  \
         ey = ymm_get_reg_empty(dyn, ninst, x1, (nextop&7)+(rex.b<<3), gd, vex.v, -1)
 
-// Get EY and non-writen GY
+// Get EY and non-written GY
 #define GETGYEY(gy, ey)                                                                         \
     if(MODREG)                                                                                  \
         ey = ymm_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 1, gd, -1, -1);                 \
@@ -573,13 +573,13 @@
     else                                                                                        \
         VLDR128_U12(ey, ed, fixedaddress+16);                                                   \
 
-// Get empty EY and non-writen GY
+// Get empty EY and non-written GY
 #define GETGYEY_empty(gy, ey)                                                                   \
     gy = ymm_get_reg(dyn, ninst, x1, gd, 0, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1, -1);       \
     if(MODREG)                                                                                  \
         ey = ymm_get_reg_empty(dyn, ninst, x1, (nextop&7)+(rex.b<<3), gd, -1, -1)
 
-// Get empty GY, and non-writen EY
+// Get empty GY, and non-written EY
 #define GETGY_empty_EY(gy, ey)                                                      \
     if(MODREG)                                                                      \
         ey = ymm_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0, gd, -1, -1);     \
@@ -587,7 +587,7 @@
         VLDR128_U12(ey, ed, fixedaddress+16);                                       \
     gy = ymm_get_reg_empty(dyn, ninst, x1, gd, (MODREG)?((nextop&7)+(rex.b<<3)):-1, -1, -1)
 
-// Get empty VY, and non-writen EY
+// Get empty VY, and non-written EY
 #define GETVY_empty_EY(vy, ey)                                                      \
     if(MODREG)                                                                      \
         ey = ymm_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0, vex.v, -1, -1);  \
diff --git a/src/dynarec/dynarec_native_functions.c b/src/dynarec/dynarec_native_functions.c
index 219fd413..6a118dfa 100644
--- a/src/dynarec/dynarec_native_functions.c
+++ b/src/dynarec/dynarec_native_functions.c
@@ -584,7 +584,7 @@ uintptr_t fakeed(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nexto
     }
     return addr;
 }
-// return Ib on a mod/rm opcode without emiting anything
+// return Ib on a mod/rm opcode without emitting anything
 uint8_t geted_ib(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop)
 {
     addr = fakeed(dyn, addr, ninst, nextop);
diff --git a/src/dynarec/dynarec_native_functions.h b/src/dynarec/dynarec_native_functions.h
index 1072a201..e9cff961 100644
--- a/src/dynarec/dynarec_native_functions.h
+++ b/src/dynarec/dynarec_native_functions.h
@@ -68,7 +68,7 @@ int getNominalPred(dynarec_native_t* dyn, int ninst);
 
 // Do the GETED, but don't emit anything...
 uintptr_t fakeed(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop);
-// return Ib on a mod/rm opcode without emiting anything
+// return Ib on a mod/rm opcode without emitting anything
 uint8_t geted_ib(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop);
 
 // Is what pointed at addr a native call? And if yes, to what function?
diff --git a/src/dynarec/rv64/dynarec_rv64_00_2.c b/src/dynarec/rv64/dynarec_rv64_00_2.c
index 1232a973..7bf4a342 100644
--- a/src/dynarec/rv64/dynarec_rv64_00_2.c
+++ b/src/dynarec/rv64/dynarec_rv64_00_2.c
@@ -529,7 +529,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             if(box64_wine) {    // should this be done all the time?
                 ANDI(x1, xFlags, 1 << F_TF);
                 CBZ_NEXT(x1);
-                // go to epilog, TF should trigger at end of next opcode, so using Interpretor only
+                // go to epilog, TF should trigger at end of next opcode, so using Interpreter only
                 jump_to_epilog(dyn, addr, 0, ninst);
             }
             break;
diff --git a/src/dynarec/rv64/dynarec_rv64_66.c b/src/dynarec/rv64/dynarec_rv64_66.c
index b0e45569..e786da98 100644
--- a/src/dynarec/rv64/dynarec_rv64_66.c
+++ b/src/dynarec/rv64/dynarec_rv64_66.c
@@ -701,7 +701,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
             if (box64_wine) { // should this be done all the time?
                 ANDI(x1, xFlags, 1 << F_TF);
                 CBZ_NEXT(x1);
-                // go to epilog, TF should trigger at end of next opcode, so using Interpretor only
+                // go to epilog, TF should trigger at end of next opcode, so using Interpreter only
                 jump_to_epilog(dyn, addr, 0, ninst);
             }
             break;