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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-05-23 09:09:04 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-05-23 09:09:04 +0200 |
| commit | 537ca9f724696fe0fb61c12cbb9a2c46aa029884 (patch) | |
| tree | e2ef437dd03e968a3215885252971bac6f6d3d0a /src/emu | |
| parent | fc5f5dab29c614a15a9cd96715ad70145f02eed5 (diff) | |
| download | box64-537ca9f724696fe0fb61c12cbb9a2c46aa029884.tar.gz box64-537ca9f724696fe0fb61c12cbb9a2c46aa029884.zip | |
Added 64 F3 0F 10 opcode ([DYNAREC] too)
Diffstat (limited to 'src/emu')
| -rw-r--r-- | src/emu/x64run64.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/emu/x64run64.c b/src/emu/x64run64.c index 3b6bb4f2..1708bb79 100644 --- a/src/emu/x64run64.c +++ b/src/emu/x64run64.c @@ -108,6 +108,32 @@ int Run64(x64emu_t *emu, rex_t rex) opcode = F8; switch(opcode) { + case 0x10: + switch(rep) { + case 1: /* MOVSD Gx, FS:Ex */ + nextop = F8; + GETEX_OFFS(0, tlsdata); + GETGX; + GX->q[0] = EX->q[0]; + if((nextop&0xC0)!=0xC0) { + // EX is not a register + GX->q[1] = 0; + } + break; + case 2: /* MOVSS Gx, FS:Ex */ + nextop = F8; + GETEX_OFFS(0, tlsdata); + GETGX; + GX->ud[0] = EX->ud[0]; + if((nextop&0xC0)!=0xC0) { + // EX is not a register (reg to reg only move 31:0) + GX->ud[1] = GX->ud[2] = GX->ud[3] = 0; + } + break; + default: + return 1; + } + break; case 0x11: switch(rep) { case 1: /* MOVSD Ex, Gx */ |