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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-04-16 12:03:05 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-04-16 12:03:13 +0200 |
| commit | 1ba0ea157fdde73df5c9f242c6ad4db7abddeaca (patch) | |
| tree | 2e5c62cd25b0aa6f906f66d371f134198e1fcc3a /src/include | |
| parent | 1e64476f313bf286caac8de08104891b5956f9ac (diff) | |
| download | box64-1ba0ea157fdde73df5c9f242c6ad4db7abddeaca.tar.gz box64-1ba0ea157fdde73df5c9f242c6ad4db7abddeaca.zip | |
[INTERP] Added x87 Precision Control set to 24bits handling
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/regs.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/include/regs.h b/src/include/regs.h index 58070c8a..d83fbcbd 100644 --- a/src/include/regs.h +++ b/src/include/regs.h @@ -245,6 +245,12 @@ typedef union { } f; uint16_t x16; } x87control_t; +/* +Precision Controls: 00b = 24bits, 01b=reserved, 10b=53bits and 11b=64bits +The precision-control bits only affect the results of the following floating-point instructions: FADD, FADDP, FIADD, +FSUB, FSUBP, FISUB, FSUBR, FSUBRP, FISUBR, FMUL, FMULP, FIMUL, FDIV, FDIVP, FIDIV, FDIVR, FDIVRP, FIDIVR, +and FSQRT. +*/ typedef union { struct __attribute__ ((__packed__)) { |