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authorYang Liu <liuyang22@iscas.ac.cn>2024-07-04 18:39:05 +0800
committerGitHub <noreply@github.com>2024-07-04 12:39:05 +0200
commiteb695d5553e82dce46d67019f48a3354ec611394 (patch)
tree6c7996715b075aacadacc39f3ca76095c5cf05d9 /src/rv64detect.c
parentb5946f37526606e05b28fc29af0b5eb1a2497414 (diff)
downloadbox64-eb695d5553e82dce46d67019f48a3354ec611394.tar.gz
box64-eb695d5553e82dce46d67019f48a3354ec611394.zip
[RV64_DYNAREC] Added preliminary RVV infra and PXOR opcode for demonstration (#1632)
* [RV64_DYNAREC] Added preliminary RVV infra and PXOR opcode for demonstration

* keep sse_cache_s uint8_t as suggested

* use xor to do the wrap

* revert

* better fallback
Diffstat (limited to 'src/rv64detect.c')
-rw-r--r--src/rv64detect.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/rv64detect.c b/src/rv64detect.c
index 698200cc..27ea2e51 100644
--- a/src/rv64detect.c
+++ b/src/rv64detect.c
@@ -69,9 +69,10 @@ void RV64_Detect_Function()
     rv64_zbs = Check(my_block);
 
     // Test Vector v1.0 with CSRR zero, vcsr
+    block = (uint32_t*)my_block;
     CSRRS(xZR, xZR, 0x00f);
     BR(xRA);
-    rv64_vector = Check(my_block);
+    rv64_vector = Check(my_block); // TODO: also check vlen >= 128
 
     // THead vendor extensions
     if (!rv64_zba) {