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authorptitSeb <sebastien.chev@gmail.com>2024-05-24 20:17:35 +0200
committerptitSeb <sebastien.chev@gmail.com>2024-05-24 20:17:35 +0200
commit39303611efec5b89b44e47217b096eff5195dc97 (patch)
treece1cc46c134b3cead7c6ab2f1c02d44d5486695e /src/tools
parentfcf0cf00d0a82649ba0cf9f6a8c0450bb6ed5f47 (diff)
downloadbox64-39303611efec5b89b44e47217b096eff5195dc97.tar.gz
box64-39303611efec5b89b44e47217b096eff5195dc97.zip
more avx infrastructure
Diffstat (limited to 'src/tools')
-rw-r--r--src/tools/my_cpuid.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/tools/my_cpuid.c b/src/tools/my_cpuid.c
index d2f283e9..9f0614bf 100644
--- a/src/tools/my_cpuid.c
+++ b/src/tools/my_cpuid.c
@@ -337,10 +337,10 @@ void my_cpuid(x64emu_t* emu, uint32_t tmp32u)
         case 0xD:   // Processor Extended State Enumeration Main Leaf / Sub Leaf
             switch(R_CX) {
             case 0:
-                R_EAX = 0b11;       // x87 SSE saved
-                R_EBX = 512+64;     // size of xsave/xrstor
-                R_ECX = 512+64;     // same
-                R_EDX = 0;          // more bits
+                R_EAX = 0b111;          // x87 SSE AVX saved
+                R_EBX = 512+64+16*16;     // size of xsave/xrstor
+                R_ECX = 512+64+16*16;     // same
+                R_EDX = 0;              // more bits
                 break;
             case 1:
                 R_EAX = 0;      // XSAVEOPT (0) and XSAVEC (1), XGETBV with ECX=1 (2) XSAVES (3) and XFD (4) not supported yet
@@ -355,11 +355,18 @@ void my_cpuid(x64emu_t* emu, uint32_t tmp32u)
                 break;
             case 3:
                 // componant 1: sse
-                R_EAX = 16*16; // size of the x87 block
+                R_EAX = 16*16; // size of the sse block
                 R_EBX = 160;  // offset
                 R_ECX = 0;
                 R_EDX = 0;
                 break;
+            case 4:
+                // componant 2: avx
+                R_EAX = 16*16; // size of the avx block
+                R_EBX = 512+64;  // offset
+                R_ECX = 0;
+                R_EDX = 0;
+                break;
             default:
                 R_EAX = R_ECX = R_EBX = R_EDX = 0;
                 break;