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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-12-27 18:32:37 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-12-27 18:32:37 +0100 |
| commit | 79413a41475e3b24fa48dfaac031fdfc05fa4e75 (patch) | |
| tree | 1b87f01f2f488eaa4aa16cdb4c7ab416893a50f6 /src/tools | |
| parent | 80b357da41743af7ba37857098c4d0c0784b31e0 (diff) | |
| download | box64-79413a41475e3b24fa48dfaac031fdfc05fa4e75.tar.gz box64-79413a41475e3b24fa48dfaac031fdfc05fa4e75.zip | |
[INTERPRETER] Exposed SSE4a for CPUTYPE=1, implemented all 4 opcodes
Diffstat (limited to 'src/tools')
| -rw-r--r-- | src/tools/my_cpuid.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/tools/my_cpuid.c b/src/tools/my_cpuid.c index e10aaca9..1980c8e0 100644 --- a/src/tools/my_cpuid.c +++ b/src/tools/my_cpuid.c @@ -519,7 +519,7 @@ void my_cpuid(x64emu_t* emu, uint32_t tmp32u) | 1<<1 // cmplegacy? | 1<<2 // securevm | 1<<5 // ABM (LZCNT) - //| 1<<6 // SSE4a (extrq, instrq, movntss, movntsd) + | 1<<6 // SSE4a (extrq, instrq, movntss, movntsd) //| 1<<7 // misaligned SSE | 1<<8 // 3DNowPrefetch //| 1<<10 // IBS |