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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-05-20 18:50:32 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-05-20 18:50:40 +0200 |
| commit | 01a386445c82ef2009ef0c527352dceb6d0281d1 (patch) | |
| tree | b4792b23a57043e411157038fa1214ac52c476ec /src | |
| parent | 3fce669f6ef2d40a11127a7c5efb003d4a522aeb (diff) | |
| download | box64-01a386445c82ef2009ef0c527352dceb6d0281d1.tar.gz box64-01a386445c82ef2009ef0c527352dceb6d0281d1.zip | |
[RV64_DYNAREC] Fixed some math emiter issues
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_66.c | 3 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_emit_math.c | 16 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.h | 9 |
3 files changed, 16 insertions, 12 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_66.c b/src/dynarec/rv64/dynarec_rv64_66.c index 50618e80..0e13192b 100644 --- a/src/dynarec/rv64/dynarec_rv64_66.c +++ b/src/dynarec/rv64/dynarec_rv64_66.c @@ -1134,7 +1134,8 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 2: INST_NAME("NOT Ew"); GETEW(x1, 0); - NOT(ed, ed); // No flags affected + MOV32w(x3, 0xffff); + XOR(ed, ed, x3); // No flags affected EWBACK; break; case 3: diff --git a/src/dynarec/rv64/dynarec_rv64_emit_math.c b/src/dynarec/rv64/dynarec_rv64_emit_math.c index 9e50cadd..6175f19d 100644 --- a/src/dynarec/rv64/dynarec_rv64_emit_math.c +++ b/src/dynarec/rv64/dynarec_rv64_emit_math.c @@ -286,10 +286,10 @@ void emit_add8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) if(rv64_zbb) { ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s4, s1); // s4 = ~res - AND(s3, s4, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s4 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s2); // cc = (~res & (op1 | op2)) | (op1 & op2) + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) IFX(X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 BEQZ(s4, 8); @@ -621,7 +621,8 @@ void emit_inc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) } } IFX(X_SF) { - BGE(s1, xZR, 8); + ANDI(s2, s1, 0x80); + BEQZ(s2, 8); ORI(xFlags, xFlags, 1 << F_SF); } ANDI(s1, s1, 0xff); @@ -676,7 +677,8 @@ void emit_dec8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) } } IFX(X_SF) { - BGE(s1, xZR, 8); + ANDI(s2, s1, 0x80); + BEQZ(s2, 8); ORI(xFlags, xFlags, 1 << F_SF); } ANDI(s1, s1, 0xff); @@ -1378,6 +1380,8 @@ void emit_adc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (rex.w) { AND(s5, xMASK, s1); if(rv64_zba) ADDUW(s5, s2, s5); else {AND(s4, xMASK, s2); ADD(s5, s5, s4);} // lo + ANDI(s3, xFlags, 1); + ADD(s5, s5, s3); // add carry SRLI(s3, s1, 0x20); SRLI(s4, s2, 0x20); ADD(s4, s4, s3); @@ -1388,6 +1392,8 @@ void emit_adc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s AND(s3, s1, xMASK); AND(s4, s2, xMASK); ADD(s5, s3, s4); + ANDI(s3, xFlags, 1); + ADD(s5, s5, s3); // add carry SRLI(s6, s5, 0x20); } } diff --git a/src/dynarec/rv64/dynarec_rv64_helper.h b/src/dynarec/rv64/dynarec_rv64_helper.h index 350f6bd7..1731de5a 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.h +++ b/src/dynarec/rv64/dynarec_rv64_helper.h @@ -276,8 +276,7 @@ if (rv64_xtheadbb) { \ TH_EXTU(i, wback, 15, 8); \ } else { \ - MV(i, wback); \ - SRLI(i, i, wb2); \ + SRLI(i, wback, wb2); \ ANDI(i, i, 0xff); \ } \ } else \ @@ -306,8 +305,7 @@ if (rv64_xtheadbb) { \ TH_EXTU(i, wback, 15, 8); \ } else { \ - MV(i, wback); \ - SRLI(i, i, wb2); \ + SRLI(i, wback, wb2); \ ANDI(i, i, 0xff); \ } \ } else \ @@ -392,8 +390,7 @@ if (rv64_xtheadbb) { \ TH_EXTU(gd, gb1, 15, 8); \ } else { \ - MV(gd, gb1); \ - SRLI(gd, gd, 8); \ + SRLI(gd, gb1, 8); \ ANDI(gd, gd, 0xff); \ } \ } else \ |