diff options
| author | ptitSeb <sebastien.chev@gmail.com> | 2025-01-01 12:12:19 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-01-01 12:12:19 +0100 |
| commit | 08930381e9416afc2e33ce09947f120ab922935c (patch) | |
| tree | 4ef48244c0417f243db6c20305d2996d193a0d32 /src | |
| parent | 495c98a488bb2b39d19dbcf97996db29345316f5 (diff) | |
| download | box64-08930381e9416afc2e33ce09947f120ab922935c.tar.gz box64-08930381e9416afc2e33ce09947f120ab922935c.zip | |
[ARM64_DYNAREC] Improved a bit MULX opcode
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_67_avx.c | 18 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c | 4 |
2 files changed, 14 insertions, 8 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_67_avx.c b/src/dynarec/arm64/dynarec_arm64_67_avx.c index fd78ff24..6dcf16bf 100644 --- a/src/dynarec/arm64/dynarec_arm64_67_avx.c +++ b/src/dynarec/arm64/dynarec_arm64_67_avx.c @@ -85,15 +85,21 @@ uintptr_t dynarec64_67_AVX(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int GETGD; GETED32(0); GETVD; - if(rex.w) { - // 64bits mul - UMULH(x3, xRDX, ed); - MULx(vd, xRDX, ed); - MOVx_REG(gd, x3); + if(rex.w) { + // 64bits mul + if((gd==xRDX) || (gd==ed) || (gd==vd)) + gb1 = x3; + else + gb1 = gd; + UMULH(gb1, xRDX, ed); + if(gd!=vd) {MULx(vd, xRDX, ed);} + if(gb1==x3) { + MOVx_REG(gd, gb1); + } } else { // 32bits mul UMULL(x3, xRDX, ed); - MOVw_REG(vd, x3); + if(gd!=vd) {MOVw_REG(vd, x3);} LSRx(gd, x3, 32); } break; diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c index f8d37d0a..191b3581 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c @@ -74,14 +74,14 @@ uintptr_t dynarec64_AVX_F2_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip else gb1 = gd; UMULH(gb1, xRDX, ed); - MULx(vd, xRDX, ed); + if(gd!=vd) {MULx(vd, xRDX, ed);} if(gb1==x3) { MOVx_REG(gd, gb1); } } else { // 32bits mul UMULL(x3, xRDX, ed); - MOVw_REG(vd, x3); + if(gd!=vd) {MOVw_REG(vd, x3);} LSRx(gd, x3, 32); } break; |