[DYNAREC] Fixed and simplified F0 B1 opcdes, plus some other various small improvments (IntoTheBreach still unstable, the other 3 works fine)

3 files changed, 15 insertions, 14 deletions

diff --git a/src/dynarec/dynarec_arm64_f0.c b/src/dynarec/dynarec_arm64_f0.c
index c4a0e9bf..8f24f917 100644
--- a/src/dynarec/dynarec_arm64_f0.c
+++ b/src/dynarec/dynarec_arm64_f0.c
@@ -63,11 +63,14 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     if(MODREG) {
                         ed = xRAX+(nextop&7)+(rex.b<<3);
                         wback = 0;
-                        CMPSxw_REG(xRAX, ed);
-                        B_MARK(cNE);
                         UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);}
+                        MOVxw_REG(x1, ed);  // save value
+                        CMPSxw_REG(xRAX, x1);
+                        B_MARK2(cNE);
                         MOVxw_REG(ed, gd);
-                        B_MARK_nocond;
+                        MARK2;
+                        MOVxw_REG(xRAX, x1);
+                        B_NEXT_nocond;
                     } else {
                         addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, 0);
                         TSTx_mask(wback, 1, 0, 1+rex.w);    // mask=3 or 7
@@ -81,7 +84,6 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         // EAX == Ed
                         STXRxw(x4, gd, wback);
                         CBNZx_MARKLOCK(x4);
-                        UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);}
                         // done
                         B_MARK_nocond;
                         // Unaligned version
@@ -95,13 +97,12 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         STXRB(x4, gd, wback);
                         CBNZx_MARK3(x4);
                         STRxw_U12(gd, wback, 0);
-                        UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);}
                         B_MARK_nocond;
+                        MARK;
+                        // Common part (and fallback for EAX != Ed)
+                        UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);}
+                        MOVxw_REG(xRAX, ed);
                     }
-                    MARK;
-                    // EAX != Ed
-                    UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);}
-                    MOVxw_REG(xRAX, ed);
                     break;
 
                 default:
diff --git a/src/dynarec/dynarec_arm64_f30f.c b/src/dynarec/dynarec_arm64_f30f.c
index d94bd822..13b8dc70 100755
--- a/src/dynarec/dynarec_arm64_f30f.c
+++ b/src/dynarec/dynarec_arm64_f30f.c
@@ -77,7 +77,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 VMOVeS(v0, 0, q0, 0);

             } else {

                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);

-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);

+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);

                 LDRw_U12(x2, ed, fixedaddress);   // to avoid bus errors

                 VEORQ(v0, v0, v0);

                 VMOVQSfrom(v0, 0, x2);

@@ -93,7 +93,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 VMOVeS(q0, 0, v0, 0);

             } else {

                 VMOVSto(x2, v0, 0);

-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);

+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);

                 STRw_U12(x2, ed, fixedaddress);

             }

             break;

diff --git a/src/dynarec/dynarec_arm64_helper.h b/src/dynarec/dynarec_arm64_helper.h
index 516c9364..6fe1bd24 100755
--- a/src/dynarec/dynarec_arm64_helper.h
+++ b/src/dynarec/dynarec_arm64_helper.h
@@ -336,10 +336,10 @@
 // Generate FCOMI with s1 and s2 scratch regs (the VCMP is already done)
 #define FCOMI(s1, s2)    \
     IFX(X_CF|X_PF|X_ZF|X_PEND) {                                            \
-        MOV32w(s1, 0b01000101);                                             \
-        BICw_REG(xFlags, xFlags, s1);                                       \
+        MOV32w(s2, 0b01000101);                                             \
+        BICw_REG(xFlags, xFlags, s2);                                       \
         CSETw(s1, cMI); /* 1 if less than, 0 else */                        \
-        MOV32w(s2, 0b01000101); /* unordered */                             \
+        /*s2 already set */     /* unordered */                             \
         CSELw(s1, s2, s1, cVS);                                             \
         MOV32w(s2, 0b01000000); /* zero */                                  \
         CSELw(s1, s2, s1, cEQ);                                             \