diff options
| author | ptitSeb <sebastien.chev@gmail.com> | 2023-03-31 20:44:42 +0000 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-03-31 20:44:42 +0000 |
| commit | 0da1f7be27b4c3490942d27d25376a699a02fb0b (patch) | |
| tree | ba91d57b493a11798f0e2b4e9044604610d7103b /src | |
| parent | b24f2f14f0ce716d1341b521978737cf8a327179 (diff) | |
| download | box64-0da1f7be27b4c3490942d27d25376a699a02fb0b.tar.gz box64-0da1f7be27b4c3490942d27d25376a699a02fb0b.zip | |
[RV64_DYNAREC] Fixed issues with x87 handling, plus some fixes on cosim
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_functions.c | 3 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.c | 15 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_pass0.h | 2 |
3 files changed, 9 insertions, 11 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_functions.c b/src/dynarec/rv64/dynarec_rv64_functions.c index 19d23e07..1bd0bbc3 100644 --- a/src/dynarec/rv64/dynarec_rv64_functions.c +++ b/src/dynarec/rv64/dynarec_rv64_functions.c @@ -60,7 +60,8 @@ void fpu_free_reg(dynarec_rv64_t* dyn, int reg) int idx = EXTIDX(reg); // TODO: check upper limit? dyn->e.fpuused[idx] = 0; - dyn->e.extcache[idx].v = 0; + if(dyn->e.extcache[reg].t!=EXT_CACHE_ST_F && dyn->e.extcache[reg].t!=EXT_CACHE_ST_D) + dyn->e.extcache[idx].v = 0; } // Get an MMX double reg int fpu_get_reg_emm(dynarec_rv64_t* dyn, int emm) diff --git a/src/dynarec/rv64/dynarec_rv64_helper.c b/src/dynarec/rv64/dynarec_rv64_helper.c index 6b44a2b7..e164e497 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.c +++ b/src/dynarec/rv64/dynarec_rv64_helper.c @@ -603,13 +603,6 @@ int x87_do_push(dynarec_rv64_t* dyn, int ninst, int s1, int t) else if(ret==-1) { dyn->e.x87cache[i] = 0; ret=dyn->e.x87reg[i]=fpu_get_reg_x87(dyn, t, 0); - #if STEP == 1 - // need to check if reg is compatible with float - if((ret>15) && (t == EXT_CACHE_ST_F)) - dyn->e.extcache[ret].t = EXT_CACHE_ST_D; - #else - dyn->e.extcache[ret].t = X87_ST0; - #endif } return ret; } @@ -776,7 +769,11 @@ static void x87_reflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int ANDI(s3, s3, 7); // (emu->top + i)&7 SLLI(s1, s3, 3); ADD(s1, xEmu, s1); - FSD(dyn->e.x87reg[i], s1, offsetof(x64emu_t, x87)); + if(extcache_get_st_f(dyn, ninst, dyn->e.x87cache[i])>=0) { + FCVTDS(SCRATCH0, dyn->e.x87reg[i]); + FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); + } else + FSD(dyn->e.x87reg[i], s1, offsetof(x64emu_t, x87)); } } @@ -1732,7 +1729,7 @@ void fpu_reflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3) void fpu_unreflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3) { // need to undo the top and stack tracking that must not be reflected permenatly yet - x87_reflectcache(dyn, ninst, s1, s2, s3); + x87_unreflectcache(dyn, ninst, s1, s2, s3); } void fpu_reset(dynarec_rv64_t* dyn) diff --git a/src/dynarec/rv64/dynarec_rv64_pass0.h b/src/dynarec/rv64/dynarec_rv64_pass0.h index dc5b9705..b07162eb 100644 --- a/src/dynarec/rv64/dynarec_rv64_pass0.h +++ b/src/dynarec/rv64/dynarec_rv64_pass0.h @@ -17,7 +17,7 @@ dyn->f.dfnone=((B)&SF_SET)?1:0; #define EMIT(A) #define JUMP(A, C) add_next(dyn, (uintptr_t)A); dyn->insts[ninst].x64.jmp = A; dyn->insts[ninst].x64.jmp_cond = C -#define BARRIER(A) if(A!=BARRIER_MAYBE) {fpu_purgecache(dyn, ninst, 1, x1, x2, x3); dyn->insts[ninst].x64.barrier = A;} else dyn->insts[ninst].barrier_maybe = 1 +#define BARRIER(A) if(A!=BARRIER_MAYBE) {fpu_purgecache(dyn, ninst, 0, x1, x2, x3); dyn->insts[ninst].x64.barrier = A;} else dyn->insts[ninst].barrier_maybe = 1 #define BARRIER_NEXT(A) dyn->insts[ninst+1].x64.barrier = A #define NEW_INST \ ++dyn->size; \ |