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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-09-05 19:12:11 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-09-05 19:12:19 +0200 |
| commit | 19dc18f7c51bcef6f8ec00f3521b8f3e8541e96c (patch) | |
| tree | 62652e5f66ff6a1dcc9274b7a021011675914bb0 /src | |
| parent | 4e63b82f5eda8995a2b5cd09d64304ac9e30dbd6 (diff) | |
| download | box64-19dc18f7c51bcef6f8ec00f3521b8f3e8541e96c.tar.gz box64-19dc18f7c51bcef6f8ec00f3521b8f3e8541e96c.zip | |
Fixed a regression introduced with box32 that broke Bladur's Gate 3 (and probably a few other)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_0f.c | 4 | ||||
| -rw-r--r-- | src/dynarec/la64/dynarec_la64_0f.c | 2 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_0f.c | 4 | ||||
| -rw-r--r-- | src/emu/x64run0f.c | 12 | ||||
| -rw-r--r-- | src/emu/x87emu_private.c | 6 |
5 files changed, 15 insertions, 13 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index 225161ce..5a752519 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -1781,7 +1781,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin fpu_purgecache(dyn, ninst, 0, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); if(ed!=x1) {MOVx_REG(x1, ed);} - CALL(rex.w?((void*)fpu_fxsave64):((void*)fpu_fxsave32), -1); + CALL(rex.is32bits?((void*)fpu_fxsave32):((void*)fpu_fxsave64), -1); break; case 1: INST_NAME("FXRSTOR Ed"); @@ -1789,7 +1789,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin fpu_purgecache(dyn, ninst, 0, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); if(ed!=x1) {MOVx_REG(x1, ed);} - CALL(rex.w?((void*)fpu_fxrstor64):((void*)fpu_fxrstor32), -1); + CALL(rex.is32bits?((void*)fpu_fxrstor32):((void*)fpu_fxrstor64), -1); break; case 2: INST_NAME("LDMXCSR Md"); diff --git a/src/dynarec/la64/dynarec_la64_0f.c b/src/dynarec/la64/dynarec_la64_0f.c index 46fea7ed..eadd17aa 100644 --- a/src/dynarec/la64/dynarec_la64_0f.c +++ b/src/dynarec/la64/dynarec_la64_0f.c @@ -764,7 +764,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, x3, &fixedaddress, rex, NULL, 0, 0); if (ed != x1) { MV(x1, ed); } - CALL(rex.w ? ((void*)fpu_fxsave64) : ((void*)fpu_fxsave32), -1); + CALL(rex.is32bits ? ((void*)fpu_fxsave32) : ((void*)fpu_fxsave64), -1); } break; case 2: diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c index 434b5a99..a4b02d48 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_0f.c @@ -1860,7 +1860,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni fpu_purgecache(dyn, ninst, 0, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &ed, x1, x3, &fixedaddress, rex, NULL, 0, 0); if (ed != x1) { MV(x1, ed); } - CALL(rex.w ? ((void*)fpu_fxsave64) : ((void*)fpu_fxsave32), -1); + CALL(rex.is32bits ? ((void*)fpu_fxsave32) : ((void*)fpu_fxsave64), -1); break; case 1: INST_NAME("FXRSTOR Ed"); @@ -1869,7 +1869,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni fpu_purgecache(dyn, ninst, 0, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &ed, x1, x3, &fixedaddress, rex, NULL, 0, 0); if (ed != x1) { MV(x1, ed); } - CALL(rex.w ? ((void*)fpu_fxrstor64) : ((void*)fpu_fxrstor32), -1); + CALL(rex.is32bits ? ((void*)fpu_fxrstor32) : ((void*)fpu_fxrstor64), -1); break; case 2: INST_NAME("LDMXCSR Md"); diff --git a/src/emu/x64run0f.c b/src/emu/x64run0f.c index 1e54db04..d81a9d12 100644 --- a/src/emu/x64run0f.c +++ b/src/emu/x64run0f.c @@ -1242,18 +1242,18 @@ uintptr_t Run0F(x64emu_t *emu, rex_t rex, uintptr_t addr, int *step) #ifdef TEST_INTERPRETER emu->sw.f.F87_TOP = emu->top&7; #else - if(rex.w) - fpu_fxsave64(emu, ED); - else + if(rex.is32bits) fpu_fxsave32(emu, ED); + else + fpu_fxsave64(emu, ED); #endif break; case 1: /* FXRSTOR Ed */ _GETED(0); - if(rex.w) - fpu_fxrstor64(emu, ED); - else + if(rex.is32bits) fpu_fxrstor32(emu, ED); + else + fpu_fxrstor64(emu, ED); break; case 2: /* LDMXCSR Md */ GETED(0); diff --git a/src/emu/x87emu_private.c b/src/emu/x87emu_private.c index c64f49cb..b5894d97 100644 --- a/src/emu/x87emu_private.c +++ b/src/emu/x87emu_private.c @@ -295,6 +295,7 @@ void fpu_savenv(x64emu_t* emu, char* p, int b16) // other stuff are not pushed.... } +// this is the 64bits version (slightly different than the 32bits!) typedef struct xsave32_s { uint16_t ControlWord; /* 000 */ uint16_t StatusWord; /* 002 */ @@ -311,9 +312,8 @@ typedef struct xsave32_s { uint32_t MxCsr_Mask; /* 01c */ sse_regs_t FloatRegisters[8];/* 020 */ // fpu/mmx are store in 128bits here sse_regs_t XmmRegisters[8]; /* 0a0 */ - uint8_t Reserved4[56*4]; /* 1a0 */ + uint8_t Reserved4[56*4]; /* 120 */ } xsave32_t; -// this is the 64bits version (slightly different than the 32bits!) typedef struct xsave64_s { uint16_t ControlWord; /* 000 */ uint16_t StatusWord; /* 002 */ @@ -359,6 +359,7 @@ void fpu_fxsave32(x64emu_t* emu, void* ed) void fpu_fxsave64(x64emu_t* emu, void* ed) { + // the subtelties of the REX.W are not handled in fxsave64/fxrstor64 xsave64_t *p = (xsave64_t*)ed; // should save flags & all int top = emu->top&7; @@ -409,6 +410,7 @@ void fpu_fxrstor32(x64emu_t* emu, void* ed) void fpu_fxrstor64(x64emu_t* emu, void* ed) { + // the subtelties of the REX.W are not handled in fxsave64/fxrstor64 xsave64_t *p = (xsave64_t*)ed; emu->cw.x16 = p->ControlWord; emu->sw.x16 = p->StatusWord; |